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SENIOR PROJECT. STUDENT:RICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASAD. DATA MOVER IN VLSI USING L-EDIT. TESTED IN DIFFERENT CAD FOR FUNCTIONALITY ASSURANCE. DATA MOVER IN VLSI USING L-EDIT WHAT IS VSLI?. - VSLI IS THE TECHNOLOGY THAT ALLOWS COMPANIES
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SENIOR PROJECT STUDENT:RICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASAD
DATA MOVER IN VLSIUSING L-EDIT TESTED IN DIFFERENT CAD FOR FUNCTIONALITY ASSURANCE
DATA MOVER IN VLSIUSING L-EDITWHAT IS VSLI? - VSLI IS THE TECHNOLOGY THAT ALLOWS COMPANIES TO CREATE THEIR OWN CUSTOM MADE IC CHIPS. - VSLI CAN REDUCE THE SIZE OF THEIR ELECTRONIC DESIGNS. - THE CONTINUOUS USE OF IC FABRICATION TECHNOLOGY WILL LOWER THE PRODUCTION COST OF COMPLICATED DESIGNS
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADOBJECTIVE The main objective was to acquire experience in asic design building a data mover with testable features to transfer data from the input to the output following a geometric algorithm. This type of design will require the use of CMOS technology and logic gate design to be fabricated into a chip
WHY USE L-EDIT? • YOU CAN TEST YOUR CIRCUIT BEFORE IMPLEMENTING IT IN L-EDIT. • L-EDIT EXTRACTS THE NECESSARY CODE TO SIMULATE CIRCUITRY IN PSPICE • THE CIRCUIT IN L-EDIT IS THE FINAL LAYOUT THAT IS SENT FOR FABRICATION
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADTABLE OF CONTENT Block diagram Design equations Two bit example of a data mover Timing control needed Timing chart
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADTABLE OF CONTENT Designs in LogicWorks Designs in L-EDIT Simulations in Pspice Final Layout
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADBLOCK DIAGRAM
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADDESIGN EQUATIONS [FROM RTL LANGUAGE (REGISTER TRANSFER LOGIC)] Data mover: Memory a[2]; b[2]; c[2]. Inputs: x[2] Outputs: z[2] 1 a x 2 c /a 3 b c[0], c[1] 4 c a v b 5 z = c
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADALGORITHM OF THE DATA MOVER FOR TWO BITS
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADTIMING CONTROLLED NEEDED
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADCONTROL CIRCUIT
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADSIMULATION OF THE CONTROLLER CIRCUIT
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADFINAL SIMULATION OF THE CONTROLLER CIRCUIT
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADCONTROLLER CIRCUIT DESIGNED IN L-EDIT
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADCONTROLLER SIMULATION IN PSPICE
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADALGORITHM OF THE DATA MOVER
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADTHE DATA MOVER
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADALGORITHM OF THE DATA MOVERIN L-EDIT
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADSIMULATION OF DATA MOVER IN PSPICE TWO BITS
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADANOTHER SIMULATION OF DATA MOVER IN PSPICE TWO BITS
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADD FLIP FLOP DESIGNED IN L-EDIT
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADD FLIP FLOP SIMULATED IN PSPICE
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADDATA MOVER COMPONENTSAND GATE
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADPSPICE SIMULATION OF THE AND GATE
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADFOUR BIT DATA MOVER
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADFINAL APPEARANCE OF THE PROJECT IN DESING PAD
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADFOUR BIT SIMULATION OF DATA MOVER IN PSPICE
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADPROBLEMS ENCOUNTERED • CONTROLLER CIRCUIT NEEDED THE CLOCK ‘S RISING AND FALLING EDGE • D FLIP-FLOP HAD TO BE DESIGNED THE SMALLEST POSSIBLE TO REDUCED SPACE • PSPICE SIMULATION FILES WERE VERY LARGE AND NEEDED MANY CAPACITORS • WE HAD TO CHANGE THE DESIGN RULES IN THE DESIGN TO ADAPT IT TO A NEW TECHNOLOGY
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADACCOMPLISHMENTS • I GOT INTRODUCED TO SEVERAL POWERFUL COMPUTER SOFTWARE THAT CAN SOLVE INDUSTRY PROBLEMS • A GREATER KNOWLEDGE WAS ACHIVED MANIPULATING LOGICWORKS, PSPICE, L-EDIT AND XILINX (VHDL) • I FEEL MORE CONFIDENT TO EXPLORE DIFFERENT FEATURES OF THESE SOFTWARE TO SOLVE PROBLEMS • I GAINED MUCH EXPERIENCE THAT IS REQUIRED IN THE INDUSTRY
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADRECOMMENDATIONS • TEST FEASIBILITY OF DESIGN EQUATIONS • SYSTEM DESIGN IN LOGICWORKS AT GATE LEVEL • SYSTEM DESIGN AT TRANSISTOR LEVEL IN LEDIT • PSPICE SIMULATION OF TRANSISTOR LEVEL • PLACE IN DESIGN PAD FOR FINAL FABRICATION
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASADAFTERMATH • THE TOTAL AMOUNT OF TRANSISTORS WAS OVER SIX THOUSAND • THE AMOUNT OF LINES OF PSPICE CODE WAS OVER FIVE HUNDRED LINES • IT TOOK THREE HUNDRED AND FIFTY LINES OF VHDL CODE TO GENERATE A DATA MOVER OF TWO BITS • TIME CONSUMED WAS ABOUT 200 HOURS OF DESIGN AND PROGRAMING FROM HALF OF LAST SEMESTER AND LAST SENIOR SEMESTER
DATA MOVER IN VLSIRICARDO V. GONZALEZ. ADVISOR: VINOD B. PRASAD • QUESTIONS?