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This project aims to design a testable data mover using CMOS technology and logic gate design, to transfer data from input to output using a geometric algorithm. The progress includes block diagrams, design equations, timing control, and the complete data mover circuit.
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Senior Project BY: Ricardo V. Gonzalez Advisor: Dr. Vinod B. Prasad
Data Mover Using Vlsi In L-Edit Testing in different CAD for functionality assurance
Objective • The main objective is to acquire experience in asic design building a data mover with testable features to transfer data from the input to the output following a geometric algorithm. This type of design will require the use of CMOS technology and logic gate design to be fabricated into a chip
Table Of Content • Block diagram • Design equations • Two bit example of a data mover • Timing control needed • Timing chart • Complete data mover (2 bit example) • Designs of circuitry finished
Table Of Content (Continued) • Updated progress • Work left to do • Question section
Design Equations • Data mover: • Memory a[2]; b[2]; c[2]. Inputs: x[2] • Outputs: z[2] • 1 a x • 2 c /a • 3 b c[0], c[1] • 4 c a v b • 5 z = c
Work Done So Far • Researched about the behavior of data mover circuit • Designed controller circuit for timing • Tested all gates and circuits • Implemented all circuits in L-EDIT
Work Left To Do • Make final connections from the design to the pad • Research about more possible applications of this design • Design a feasible application • Send design for fabrication • Prepare for expo 2001
Question Section • Any questions or comments?