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ECE 667 Spring 2013 Synthesis and Verification of Digital Circuits. Boolean Functions and their Representations. Slides adopted (with permission) from A. Kuehlmann, UC Berkeley 2003. B 0. B 1. B 2. B 4. The Boolean Space B n. B = { 0,1}, B 2 = {0,1} X {0,1} = {00, 01, 10, 11}.
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ECE 667Spring 2013Synthesis and Verificationof Digital Circuits Boolean Functions and their Representations Slides adopted (with permission) from A. Kuehlmann, UC Berkeley 2003
B0 B1 B2 B4 The Boolean Space Bn B = { 0,1}, B2 = {0,1} X {0,1} = {00, 01, 10, 11} Karnaugh Maps: Boolean Cubes: B3 ECE 667 Synthesis & Verification - Boolean Functions
Boolean Functions x2 x1 ECE 667 Synthesis & Verification - Boolean Functions
f = x1 f = x1 x3 x3 Notation: x’ = x x2 x2 x1 x1 Boolean Functions Literal x1 represents the logic function f, where f = {x| x1 = 1} Literal x1 represents the logic function g where g = {x| x1 = 0} ECE 667 Synthesis & Verification - Boolean Functions
Set of Boolean Functions • Truth Table or Function Table: • There are 2n vertices in input space Bn • There are 22n distinct logic functions. • Each subset of vertices is a distinct logic function: f Bn x1x2x3 0 0 0 1 0 0 1 0 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 0 1 1 0 1 1 1 1 0 x3 x2 x1 ECE 667 Synthesis & Verification - Boolean Functions
Boolean Operations - AND, OR, COMPLEMENT Given two Boolean functions: f : Bn B g : Bn B • AND operation f × g = {x | f(x)=1 Ù g(x)=1} • The OR operation f + g= {x | f(x)=1 Ú g(x)=1} • The COMPLEMENT operation (^f or f’ ) f’ = {x | f(x) = 0} ECE 667 Synthesis & Verification - Boolean Functions
Cofactor and Quantification Given a Boolean function: f : Bn B, with the input variables (x1,x2,…,xi,…,xn) • Positive Cofactor of function f w.r.t variable xi fxi= {x | f(x1,x2,…,1,…,xn)=1} • Negative Cofactor of f w.r.t variable xi fxi’ = {x | f(x1,x2,…,0,…,xn)=1} • Existential Quantification of function f w.r.t variable xi, $xi f = {x | f(x1,x2,…,0,…,xn)=1 Ú f(x1,x2,…,1,…,xn)=1} • Universal Quantification of function f w.r.t variable xi, "xi f = {x | f(x1,x2,…,0,…,xn)=1 Ù f(x1,x2,…,1,…,xn)=1} ECE 667 Synthesis & Verification - Boolean Functions
Representations of Boolean Functions • We need representations for Boolean Functions for two reasons: • to represent and manipulate the actual circuit we are “synthesizing” • as mechanism to do efficient Boolean reasoning • Forms to represent Boolean Functions • Truth table • List of cubes: Sum of Products, Disjunctive Normal Form (DNF) • List of conjuncts: Product of Sums, Conjunctive Normal Form (CNF) • Boolean formula • Binary Decision Tree, Binary Decision Diagram • Circuit (network of Boolean primitives) • Canonicity – which forms are canonical? ECE 667 Synthesis & Verification - Boolean Functions
abcd f 0 0000 0 1 0001 1 2 0010 0 3 0011 1 4 0100 0 5 0101 1 6 0110 0 7 0111 0 8 1000 0 9 1001 1 10 1010 0 11 1011 1 12 1100 0 13 1101 1 14 1110 1 15 1111 1 Truth Table • Truth table (Function Table): The truth table of a function f : Bn B is a tabulation of its values at each of the 2n vertices of Bn.(all mintems) Example: f =a’b’c’d + a’b’cd + a’bc’d + ab’c’d + ab’cd + abc’d + abcd’ + abcd (Notation for complement: a’ = a ) The truth table representation is - intractable for large n - canonical Canonical means that if two functions are the same, then the canonical representations of each are isomorphic (identical). ECE 667 Synthesis & Verification - Boolean Functions
Boolean Formula • A Boolean formula is defined as an expression with the following syntax: formula ::= ‘(‘ formula ‘)’ | <variable> | formula “+” formula (OR operator) | formula “×” formula (AND operator) | ^ formula (complement) Example: f = (x1×x2) + (x3) + ^^(x4 × (^x1)) typically the “×” is omitted and the ‘(‘ and ‘^’ are simply reduced by priority, e.g. f = x1x2 + x3 + x4^x1 ECE 667 Synthesis & Verification - Boolean Functions
c = x1 f = x1x2 f = x1x2x3 x3 x3 x3 x2 x2 x2 x1 x1 x1 Cubes • A cube is defined as the product (AND) of a set of literal functions (“conjunction” of literals). Example: C = x1x’2x3 represents the following function f = (x1=1)(x2=0)(x3=1) ECE 667 Synthesis & Verification - Boolean Functions
Cubes • If C f, C a cube, then C is an implicant of f. • If C Bn, and C has k literals, then |C| covers 2n-k vertices. Example: C = xy B3 k = 2 , n = 3 => |C| = 2 = 23-2. C = {100, 101} • In an n-dimensional Boolean space Bn, an implicant with n literals is a minterm. ECE 667 Synthesis & Verification - Boolean Functions
List of Cubes - Cover Sum of Products (SOP) • A function can be represented by a sum of cubes (products): f = ab + ac + bc Since each cube is a product of literals, this is a “sum of products” (SOP) representation • A SOP can be thought of as a set of cubes F F = {ab, ac, bc} • A set of cubes that represents f is called a cover of f. Sets: F1={ab, ac, bc} and F2={abc, a’bc, ab’c, abc’} are some of possible covers of Boolean function f = ab + ac + bc. ECE 667 Synthesis & Verification - Boolean Functions
root node a b c+bd b b c c+d c c d d 0 1 Binary Decision Diagram (BDD) f = ab+a’c+a’bd Graph representation of a Boolean function - vertices represent decision nodes for variables - two children represent the two subfunctions f(x = 0) and f(x = 1) (cofactors) - restrictions on ordering and reduction rules can make a BDD representation canonical - function is evaluated as sum of paths from root to constant node 1 - paths form disjoint cubes. 1 0 ECE 667 Synthesis & Verification - Boolean Functions
Boolean Networks • Used for two main purposes • as representation for Boolean reasoning engine • as target structure for logic implementation which gets restructured in a series of logic synthesis steps until result is acceptable • Efficient representation for most Boolean problems • memory complexity is same as the size of circuits we are actually building • Close to input representation and output representation in logic synthesis ECE 667 Synthesis & Verification - Boolean Functions
Definitions –Boolean Network Definition: ABoolean networkis a directed graph C(G,N) where G are the gates and N Í G´G is the set of directed edges (nets) connecting the gates. Some of the vertices are designated: Inputs:I Í G Outputs:O Í G, I Ç O = Æ Each node g is assigned a Boolean function fg which computes the output of the gate in terms of its inputs. ECE 667 Synthesis & Verification - Boolean Functions
Definitions –fanin, fanout, support • The(immediate)faninFI(g) of a gate g are all predecessor vertices of g: FI(g) = {g’ | (g’,g) Î N} • Thetransitive fanin FIT (g) is defined as follows: if a Î FI(b) andb Î FI(c) then a Î FIT (c) • ThefanoutFO(g) of a gate g are all successor vertices of g: FO(g) = {g’ | (g,g’) Î N} The transitive fanout is defined similarly TheconeCONE(g) of a gate g is the transitive fanin of g and g itself. ThesupportSUPPORT(g) of a gate g are all inputs in its cone: SUPPORT(g) = CONE(g) Ç I ECE 667 Synthesis & Verification - Boolean Functions
8 7 1 4 6 2 9 5 3 Example –Boolean Network O I FI(6) = {2,4} FO(6) = {7,9} CONE(6) = {1,2,4,6} SUPPORT(6) = {1,2} Nodes = logic functions of arbitrary complexity ECE 667 Synthesis & Verification - Boolean Functions
Boolean Network Representations • Vertices can have arbitrary number of inputs and outputs • typically single-output functions are used • Vertices can represent any Boolean function stored in different ways, such as: • other circuits (hierarchical representation) • truth tables or cube representation • Boolean expressions read from a library description • BDDs, AIGs, etc. • Data structure allow very general mechanisms for insertion and deletion of vertices, pins (connections to vertices), and nets ECE 667 Synthesis & Verification - Boolean Functions
f f g g AND-INVERTER Circuits • Base data structure uses two-input AND function for vertices and INVERTER attributes at the edges (individual bit) • use De’Morgan’s law to convert OR operation etc. • Hash table to identify and reuse structurally isomorphic circuits Means complement ECE 667 Synthesis & Verification - Boolean Functions
Data Representation • Vertex: • pointers (integer indices) to left and right child and fanout vertices • collision chain pointer • other data • Edge: • pointer or index into array • one bit to represent inversion • Global hash table holds each vertex to identify isomorphic structures • Garbage collection to regularly free un-referenced vertices ECE 667 Synthesis & Verification - Boolean Functions
7463 1345 6423 …. …. …. Data Representation Hash Table one 8456 ... …. 0455 0456 0456 zero Constant One Vertex left 0 0457 ... right 1 next fanout hash value left pointer complement bits right pointer 0456 left 0 next in collision chain right 0 array of fanout pointers next fanout ECE 667 Synthesis & Verification - Boolean Functions