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Development of Readout system for FPCCD Vertex Detector. Tomoyuki Saito (Tohoku Univ.). Outline. ● FPCCD Vertex Detector ● Readout ASIC ● FPCCD readout test ● Summary. 2010/10/ @ IWLC 2010. FPCCD Vertex Detector. Full depleted. ● FPCCD (Fine Pixel CCD)
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Development of Readout system for FPCCD Vertex Detector Tomoyuki Saito (Tohoku Univ.) Outline ●FPCCD Vertex Detector ● Readout ASIC ●FPCCD readout test ●Summary 2010/10/ @ IWLC 2010
FPCCD Vertex Detector Full depleted ●FPCCD (Fine Pixel CCD) ☛ Pixel size : 5mm× 5mm ☛ Epitaxial layer thickness : 15 mm ● Total channel : 6080ch ☛ 20000×128 pix/ch ⇒ Total pixel : ~1010 pixel Very large Development of Readout system for FPCCD is essential. ・ The number of pixels is very big. ・ All pixels of FPCCD is read in the inter-train time (200ms).
Prototype-FPCCD Prototype-FPCCD was made for test The readout test of prototype-FPCCD have been performed in our system
Readout system Readout board CCD SiTCP FPGA Operation signal Data (Ethernet) FPGA Data Readout ASIC Control Operation signal Data
Readout system Readout board CCD SiTCP FPGA Operation signal Data (Ethernet) FPGA Data Readout ASIC Control Operation signal Important Data
Readout ASIC Requirements for ASIC Prototype-ASIC • Noise level< 30 electrons • Power consumption <6mW/ch • Readout speed > 10 Mpix/sec Measures Charge sharing ADC ⇒ 10 mW/ch 5 Mpix/sec × 2 Design of readout ASIC ADC Output Pre-amplifier LPF CDS CCD output ADC LVDS driver Noise suppression
Performance of readout ASIC The performance of readout ASIC is checked. ADC distribution for pedestal ●Noiselevel → ○ ~28electrons (Goal : 30 e) ●Readout rate → × 1.5 Mpix/s (Goal: 10Mpix/s) 1.5 Mpix/sec The performance of the total readout system is checked using this readout ASIC.
Performance of readout ASIC The performance of readout ASIC is checked. ADC distribution for pedestal ●Noiselevel → ○ ~28electrons (Goal : 30 e) ●Readout rate → × 1.5 Mpix/s (Goal: 10Mpix/s) 1.5 Mpix/sec RMS=0.69 Because of the short of current supplied the comparator in ADC The performance of the total readout system is checked using this readout ASIC.
CCDreadout test : Pedestal The pedestal distribution of CCD 1channel is checked. Pedestal picture of 1channel (ADC count) Sensor region
Pedestal of CCD The 1channel data of CCD is read and the pedestal distribution is checked. ADC distribution for pedestal of CCD 1ch Sensor region ADC for pedestal of CCD 1line (60th line) ADC Noise level Pixel position Next, the noise level is investigated in detail.
Noise on FPCCD readout system The ADC distribution for pedestal on 1 pixel is checked. ADC distribution on one pixel Noise level : ~202electrons RMS=5.06 ・~30 e from ASIC ・~90 e from the cable ・~80 e from CCD The noise level is big and is needed to improve.
CCD readout test : Test with LED CCD is covered with the photo mask and radiated LED light. ● Photo mask (made of brass) ☞ Character size: 1mm×1mm ☞ Line width : 0.2 mm ● Timeradiated LED: 0.2s Photo mask 1㎜ 1㎜ CCD picture radiated LED Success in reading 「ILC」 picture!
Summary and Plan We have developed the sensor and readout system for FPCCD. Result of performance test ☛ Readout ASIC ・Readout speed : 1.5Mpix/sec (Goal : 10 Mpix/sec ) ・Noise level : Clear (~30e) ☛CCD sensor + Readout system ・ Noise level : 200 e ・Able to read picture Plan ● Readout ASIC Next prototype for ASIC will be made on next January ⇒Readout rate : Our goal (10Mpix/sec) will be reached. ●FPCCD readout test ・Test using laser