Solar Probe Plus FIELDS Instrument PDR Digital Fields Board

1. Solar Probe Plus FIELDSInstrument PDRDigital Fields Board David Malaspina CU/LASP David.Malaspina@lasp.colorado.edu

2. DFB Agenda • Science Objectives • Performance and Driving Requirements • DFB Block Diagram • Electrical Diagram / Layout • Interfaces • DFB Processing • Development Status • Resources • Backup Information • L3 Requirements • Data Product Details • Heritage • QA, Parts, Materials, Safety • BOM • Schedule • Risks • Action Items

3. DFB High-Level Tasks The Digital Fields Board on Solar Probe Plus: 1) Accepts signals from 5 electric field sensors, 4 search coil magnetic field sensors 2) Performs analog processing, digitization, and digital processing of: Voltage signals (antenna-to-spacecraft ground) DC-coupled, AC-coupled Electric field signals (antenna-to-antenna) DC-coupled (High-gain, Low-gain), AC-coupled Magnetic field signals (> 10 Hz) Low-frequency coil signals (High-gain and Low-gain) Medium-frequency coil signals 3) Generates time domain and spectral domain data products, transmit them to the digital control board (DCB) 4) Provides calibration signals for search coil magnetometer

4. Electric Field Science Drivers Electric Fields of Scientific Interest + DFB Frequency Coverage

5. Magnetic Field Science Drivers Magnetic Fields of Scientific Interest + DFB Frequency Coverage

6. DFB Design Drivers Solar Probe Plus • Science Challenges • Unknown / highly variable plasma environment – signal strengths are not well established. Requires large dynamic range. • DFB has programmable gain states • DFB uses low-noise operational amplifiers • DFB has flexible configurations • Low telemetry volume. Requires on-board pre-selection of highest-rate data • DFB has burst memory • DFB has waveform compression • DFB has flexible data rates • Engineering Challenges • Low power and mass allocation • DFB uses a Teledyne SIDECAR for A/D conversion • High temperature environment • Requires testing and characterization at expected temperatures

7. DFB Block Diagram

8. DFB ETU #1 PWB Layout

9. DFB FPGA DIAGRAM

10. DFB Interface Documents • Electrical • SPF_MEP_102_DFB_ICD_REV4 • SPP_SCM-REC-10000-SP-0081-LPC2E v1-2 • SPF_MEP_110_Connectors_REVA • Command & Data • SPF_MEP_100_CDI_ICD_REV5 • Mechanical • MICD SPP-MEP-MEC- TBD • SPF-MEP-MEC-004 Rev01 MEP Daughter Board • SPF-MEP-MEC-005 RevC MEP PCB Outline • SPF-MEP-MEC-006 Rev01 DB Standoff • SPF-MEP-MEC-010 Rev01 DB Insert • SPF-MEP-MEC-011 Rev01 DB Push Stop • MAV-IDP-MEC-009 RevC PCB Insert

11. Analog DFB Processing High level block diagram goes here Show schematic analog processing, digital processing

12. Digital DFB Processing

13. DFB Development Status SIDECAR Evaluation Board Prototype DFB Xilinx FPGA DB ETU #2 Flatsat Flight DFB FPGA DB ETUs and Flight DFBs can accommodate all variations of FPGA DB: Xilinx, ProASIC, ProtoRTAX, Flt RTAX ETU #1

14. DFB Resources • Mass • CBE 444 grams, NTE 524 grams • Power • CBE 2.2 W, NTE 2.53 W • Volume • 9.2” x 6.2” x 0.713” perSPF-MEP-MEC-005 • Telemetry to DCB • Survey Data Volume ≈ 15,750 bits/s • Spectral Data Volume ≈ 4,583 bits/s • Burst Data Volume ≈ 60,480 bits/s

15. DFB BU Data Backup Information

16. Level-3 Requirements (Time Domain)

17. Level-3 Requirements (Frequency Domain)

18. Cycle Definition All power supplies on SPP synchronized at 150 kHz + N x 50 kHz From EMC plan 150 kS/s DFB sampling is phase-locked with power switching for lowest noise But, digital processing is most efficient on data in powers of 2 150,000 is not a power of 2, closest is 2^17 = 131,072 Define a ‘cycle’ as 131,072 samples Time of one ‘cycle’ is 131,072 / 150,000 = 0.8738133... seconds Defining samples per cycle (S/c) instead of samples per second (S/s) DFB digital operations will be synchronized to a PPC (pulse per cycle) delivered by the DCB (digital control board)

19. DFB Data Products (Time Domain)

20. DFB Data Products (Time Domain)

21. DFB Data Products (Frequency Domain)

22. DFB Science Objectives and Heritage • Seven units on orbit giving 39 unit–years of problem-free operation. • No upsets or anomalies have been seen on any of the in-flight units.

23. LASP Product Assurance • Will follow LASP’s Quality Management System Plan and the SPP SMA Requirements and Compliance Matrix • QA and project team have experience on multiple flight programs • LASP’s standard build processes to be followed • Assembly and inspection personnel certified to NASA workmanship standards • Hardware inspection processes in place • MIPs to be performed by APL/SSL as required per SMA Matrix • LASP QA to inspect at vendor facilities if necessary • Will follow LASP’s standard practices for contamination control • LASP Alert and Advisory Procedure to be followed for GIDEP • GIDEP Representative in place • Personnel trained and certified to LASP’s ESD Control Procedure • ESD Control program designed per ANSI/ESD S20.20 • Access to labs denied without ESD certification

24. EEE Parts/PWB, Materials & Processes, and System Safety • DFB will comply with parts control and materials & processes requirements per the SMA Requirements and Compliance Matrix • LASP EEE Parts Engineer will work with the UCB/SSL and JHU/APL Parts Control Board to assure that all parts and PWBs have approved for use • Parts will be procured, and derated, to EEE-INST-002, Level 2 or better • Will facilitate delivery of: PEPL, ADPL, and ABPL • All PWB coupons shall be provided for test/approval at GSFC • LASP Materials Engineer will work with the UCB/SSL and JHU/APL MPCB to assure that all materials and processes are approved for use • Evaluated in accordance with program requirements • Will facilitate delivery of: MIL, ADMPL, and ABMPL • DFB will support JHU/APL Mission System Safety Program Plan • Assist with Safety Requirements Compliance Checklist, OHA, Hazard Tracking Log • Initial Hazard Assessment revealed no applicable hazards • No N2 purge or high-pressure devices • No high voltage • No hazardous materials, flammable or explosives materials, or radiation sources • In the event, exceptions will be noted through safety waivers/deviations

25. DFB BOM

26. DFB Schedule • Critical path is thru ETU • Reserve held @ 1mnth/year • Schedule threat is PWB Deflection and component integrity • Risk mitigation is Vibe Test ETU1 ETU2

27. DFB SIDECAR Qualification Workmanship Risk 5 If the SIDECAR experiences latent failure and/or has reliability issues, then the lack of a complete EIDP and respective workmanship could hinder the debug/troubleshooting, and have the potential to degrade performance and warrant possible redesign which could increase needed mass and power.Risk mitigationplan is to perform characterization and environmental testing on SIDECARs. These parts have prior electrical burn-in testing hence characterization and environmental tests will demonstrate good rigor to retire the risk.  4 F-DFB01 PM 3 Likelihood of Occurrence (probability) 2 1 1 2 3 4 5 Consequence of Occurrence (Impact) Risk rating: Probability 2, Impact 3; not likely to occur based on successful burn-in testing completed by GSFC/Teledyne; consequences slightly higher based on possibility of reverting to backup plan of discrete ADCs. Proposed/heritage ADCs are not as rad-tolerant, require more board space (mass increases), more power, and/or could drive science return. Newer, more viable, ADCs identified but require radiation testing. High Medium Low (Criticality)

28. DFB PWBA Structural Risk 5 If the DFB PWBA experiences too high of structural deflection, then the assembled components may experience package stresses, with respective workmanship and/or reliability issues. The primary concern is the SIDECAR CGAs. This potential could warrant possible redesign of the PWB layout, structural stiffness design, or reduction in DFB capability due to replacing the SIDECAR/other components to stay within mass and power constraints. Analysis and part modeling in process now. Risk mitigationplan is to perform vibration testing to SPF-MEP vibration levels on an ETU PWB with representative components and mass models.Analysis and modeling,along with vibration testing, must prove the PWBA design and demonstrate good rigor to retire the risk 4 F-DFB02 3 PMSC Likelihood of Occurrence (probability) 2 1 1 2 3 4 5 Consequence of Occurrence (Impact) Risk rating: Probability 2, Impact 4; not likely to occur based on analysis and modeling and good design practices of the PWBA. Consequences higher based on possibility of impact at a PDR level which may require redesign and/or reverting to backup plan of discrete ADCs. Analysis completing, vibe test post PDR. High Medium Low (Criticality)

29. DFB Related Action Items DFB Peer Review held Nov 4-5th, materials available on SPF site Action Items from this and other Peer reviews included here (SCM Peer Review Sept 4-5, 2013)