Partition-Driven Standard Cell Thermal Placement

1. Partition-Driven Standard Cell Thermal Placement Guoqiang Chen Synopsys Inc. Sachin Sapatnekar Univ of Minnesota For ISPD 2003

2. Outline • Introduction • Thermal Placement • Simplified Thermal Model for Partitioning • Partition-Driven Thermal Placement • Experimental Results • Conclusion

3. Why Thermal Placement? • Thermal problem is projected to be a major bottleneck for the next-generation circuits • Placement is the natural starting point in the design process where we take thermal problem into consideration Courtesy Intel

4. Typical Heat Conduction Environment of the Wafer + ~ ... ... heat sources wafer y z x ... ... ambient temperature + ~

5. Thermal Equation • Partial differential equation • We will consider the steady state version: Poison Equation • Applying finite difference method and eliminating internal mesh nodes yields G T = P • G is the thermal conductance matrix • T and P are the temperature and power density vector over mesh nodes on the top surface of the wafer

6. Thermal Placement • Minimize max. temperature variation • Problem formulation: Find permutation  of Pi: {1, …,n}  {1,…n} such that δT = max|Ti-Ti,neighbor| is minimized (No wire-length/timing considerations) • This is a NP-hard problem already • Previous work • Chu and Wong, TCAD98: matrix synthesis • Tsai and Kang, TCAD00: simulated annealing based

7. Partition-Driven Thermal Placement • Partition based placement methods are powerful methods to solve the placement problems • Could we easily extend Tsai and Kang’s work for partition driven placement?

8. Two Obvious Approaches • Use equation G T=P directly at each partitioning step • During the early partitioning stages, we do not know where the cells will be eventually located • Too expensive to compute • Compute the desired power distribution, and try to match the power distribution during partition stages • Difficult to get an exact budget for the power distribution • We are not optimizing the temperature directly

9. Outline • Introduction • Thermal Placement • Simplified Thermal Model for Partitioning • Partition-Driven Thermal Placement • Experimental Results • Conclusion

10. Simplified Thermal Model for Partitioning • It is known that Poisson equation can be solved with Multigrid method effectively • Our model is motivated by one interpretation of the mutligrid methods

11. Multigrid Solver for Poisson Equation • The multi-grid method solves different spatial frequency components at different levels of mesh. • Low-frequency components: coarse mesh • High-frequency components: fine mesh • The temperature distribution across the chip can be considered as a superposition of low spatial frequency components and high spatial frequency components

12. Top-down Partition Process Thermal grids Standard cell This process can be considered as series of operations on a gradually refined meshes

13. Basic Ideas • At each partition level, we are only concerned about the spatial distribution of the temperature corresponding to the current coarse grids • In the early stage of partitioning, we are mainly concerned about the low frequency components • As the mesh is refined, higher frequency terms, corresponding to local variation of temperature, will be considered

14. Simplified Thermal Model • At each partition level, we are only interested in controlling the temperature differences between the current coarse grids. • We will assume that the temperature within each grid is same.

15. The First Step in Top-down Partitioning N TL TR • Original Equation:GT=P T, P are N2 x 1 vector, and G is a N2 x N2 matrix • Now the equation is simplified to: 1 1 N

16. Extension to General Case • This process can be extended to general case where we partition the chip into k regions • Resulting G matrix is a k x k matrix and it is positive definite

17. Outline • Introduction • Thermal Placement • Simplified Thermal Model for Partitioning • Partition-Driven Thermal Placement • Experimental Results • Conclusion

18. Before Partitioning a New Level • Compute the simplified thermal conductivity matrix G • Prepare the matrix for incremental update

19. Before Partitioning of a Block • Generate multiple initial solutions and compute δT • Set the thermal budget for the current partition to be (1-α) δTmin + α δTmax • Pick the initial partition with lowest δTas the initial solution for partitioner

20. When We Move One Cell • Compute power changes induced by the cell movement • Compute temperature changes for blocks that are affected by the move. • Compute δTfor the current move, and check against the budget to see if we will accept the move or not

21. Outline • Introduction • Thermal Placement • Simplified Thermal Model for Partitioning • Partition-Driven Thermal Placement • Experimental Results • Conclusion

22. Experimental Results

23. Maximum On-Chip Temperature Variation

24. Maximum Temperature

25. Conclusion • We presented an simplified thermal model to take temperature directly as partition constraints. • The basic idea is we want to control different spatial frequency of the temperature variation at different partition level • We proposed a top-down partition-driven placement scheme to use the simplified model

26. End Thank You