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Gamma-ray Large Area Space Telescope. GLAST Large Area Telescope: Tracker Subsystem WBS 4.1.4 1A: Introduction Robert Johnson Santa Cruz Institute for Particle Physics University of California at Santa Cruz Tracker Subsystem Manager johnson@scipp.ucsc.edu. Review Outline. Introduction
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Gamma-ray Large Area Space Telescope GLAST Large Area Telescope: Tracker Subsystem WBS 4.1.4 1A: Introduction Robert Johnson Santa Cruz Institute for Particle Physics University of California at Santa Cruz Tracker Subsystem Manager johnson@scipp.ucsc.edu
Review Outline • Introduction • Design and modeling • Engineering Model • Mission Assurance • Parts and materials procurements • Manufacturing and assembly • Testing
Stiff composite panels (>500 Hz) Allows small gap between x-y SSD layers Tungsten foils on panel bottom SSDs on top & bottom faces Electronics on panel edges Minimizes the gap between towers (1.59 cm Si to Si) Carbon-fiber walls for vertical support Very stiff box structure Passive cooling to tower base New flexure attachment to Grid Decouple from thermal expansion Lowest frequency >150 Hz Greatly reinforced attachment to the bottom tray. Thermal straps couple sidewalls to the Grid (not shown) Design Overview Multi-Chip Electronics Module (MCM) 19 Carbon-Fiber Tray Panels Carbon-Fiber Sidewalls (Aluminum covered) Carbon-Fiber Wall 2 mm gap Readout Cable Titanium Flexure Mounts
Closeup view of the interfaces on the bottom of a Tracker module. This interface has been substantially redesigned since the May ’02 random vibration tests of the prototype tower module, during which structural failures occurred in the carbon-carbon closeouts of the bottom tray. Design Overview
Tracker WBS & Interfaces • Interface Control Documents • Mechanical: LAT-SS-00138 • Electrical: LAT-SS-00176 Thermal Straps
Action Items from Delta-PDR Review • Testing of the readout electronics at the multi-ladder level prior to submission of the ASIC designs. • 3 ladders were tested prior to the ASIC review (Dec. 6). • Testing of complete trays is happening now. • Verify design changes to the bottom tray and Grid interface prior to the EM test. Also the sidewalls. • Static pull tests are included in the plan (Presentation 2D). • YS90 sidewalls are being tested now. • K13D sidewalls material is being procured and will be tested. • Complete polyswitch testing and make a decision • This was done, and the part has been approved and is currently being procured by SLAC. • Review schedule and milestones after completing the current round of ASIC testing. This was done. The electronics remain on the critical path, but the ASICs have been procured. • Develop a spares plan: LAT-TD-01379 (released).
Requirements Flowdown • The flowdown shown in Foldout D of our NASA proposal is still valid. • Science Requirements that flow down to the Tracker design: • Effective Area • Field of View (aspect ratio) • Point Spread Function • Background Rejection • Dead Time • These Science Requirements flow down to the Tracker Level-3 requirements, documented in LAT-SS-00017. • Presentation 1C shows how we have validated that our design satisfies these Level-3 requirements.
Science Requirements Flowdown • Effective Area • Geometric area: limited by rocket shroud and calorimeter mass • Conversion efficiency: maximum practical amount of tungsten • Tracking efficiency: • Highly efficient detection plane to plane (SSDs) • Detailed event information (good 2-track separation) • Excellent signal-background separation • Field of View (aspect ratio) • High-precision and compactness of the SSDs allows the measurement layers to be closely spaced • Self triggering and high rate capability eliminates the need for a time-of-flight hodoscope • Background Rejection • Depends on detailed event information (good 2-track separation) • Dead Time • Goals are readily achieved with solid-state detectors
Science Requirements Flowdown • A good Point Spread Function depends on • Minimizing effects of multiple scattering • Measurement immediately following tungsten (minimal moment arm from scattering) • Nearly 100% detection efficiency, to get two measurements as close as possible to the vertex • Highly detailed event information • Avoid track confusion • Identify the location of the conversion vertex • Cull out problematic event configurations (tails in the PSF) • Many thin converters • Limited by cost • The need to support the layers is also a practical limit • Minimal mass in structural material (carbon fiber) • Avoid conversions in non-optimal locations • Avoid unnecessary multiple scattering and Compton scattering • Good spatial resolution (strip pitch/layer spacing)
Mass Allocation: 510 kg Actual: 509 kg Conditioned Power Allocation: 155 W Actual: 148 W Measured on EM prototype readout modules Plus estimate of SSD power Radiation hardness Presentation 2B Reliability Presentation 2C Environmental LAT-TD-778 Contamination Control LAT-MD-404 Parts Control LAT-MD-099 EMI/EMC 433-RQMT-0005 Presentation 2A More Requirements
Critical or Problem Design Areas • Several design factors and design problems that affect the the Tracker performance, particularly efficiency and PSF, have been studied intensively since PDR: • Low-mass structure (carbon-fiber) • Pre-EM mechanical prototype • Prove and debug the detailed design • Preliminary structural testing • (failure at GEVS qual. levels) • EM trays and Tracker module • Work out all manufacturing issues • Prove the final design • Presentation 2D will show how the present design • Satisfies all structural requirements • Provides adequate stiffness to accommodate the close spacing of trays with towers and towers within the LAT
Critical or Problem Design Areas Road to a final bottom-tray design • Originally designed to Delta-II GEVS levels (Appendix A) • Tested to generic GEVS levels (doubled the loads at the transverse resonance) • Failure in the carbon-carbon highlighted lack of margin in the original design and insufficient data on material and joint allowables. • A failsafe design at these generic GEVS levels proved to be difficult and very expensive ($ and schedule) • No project input to allow us to use realistic levels or notching despite apparent common opinion that • Structure-born levels will be low at the resonance frequency (>100 Hz) • Acoustic analysis loads will be very low compared with these GEVS qualification levels • The GEVS levels produce accelerations >45g at the transverse resonance! • Analysis indicates finally that the present design does have margin with respect to the GEVS levels. • Margins relative to realistic test levels are now very large.
1-yr Chronology of the Bottom Tray Invar ART Break COI Joint Pull Tests Shake COI/Hytec Materials Testing Final Design Hytec Analysis & Design COI Reinforced Tray
Critical or Problem Design Areas • Electronics Cooling and Thermal Design • SSDs should not operate above about 30C at end-of-life, to avoid loss of detection efficiency due to shot noise. • Presentation 2A: Prototype ICs demonstrated that we can meet our most optimistic power estimate (0.25 W per SSD layer). • Presentation 2D: • The sidewall material was changed to a higher performance fiber to lower the temperature rise, and the modules will be painted black (except bottom), to radiate some power to each other and to the ACD. • Thermal straps were added to carry the heat directly from the sidewalls to the Grid. • Silicon Strip Detectors • Presentation 5C: no design changes since PDR • Presentations 6C, 6D: abundant data on flight SSDs and flight ladders that show that the ladders will more than satisfy all requirements, especially on the number of bad channels.
Critical or Problem Design Areas • Low-Noise, Low-Power Electronics • At PDR the noise and efficiency requirements were demonstrated by a full-up system in the beam test and balloon flight module, except for the problem of retriggering while a readout is in progress. • Delta-PDR highlighted problems with the ASIC design process, with some problems remaining at the ASIC CDR. • Presentation 2A: tests of the final round of prototype ASICs with full-length SSD ladders (presented at ASIC CDR) • Noise and noise-occupancy requirements are satisfied at threshold levels that should give ~100% efficiency • There is no longer a problem with keeping the trigger active during readout • Power consumption meets our goals and requirements • Presentation 2A: preliminary results from the flight ASICs, which have already been manufactured. • Design problems and bugs all appear to be resolved.
Manufacturing & Assembly • Most manufacturing and assembly will be done by commercial vendors (details in 6A through 6H): • Mechanical structures: composites vendor in Italy • Ladders and tray assembly: two electronics assembly vendors in Italy • Electronics modules: electronics assembly vendor in L.A. • Parts and materials are “customer furnished” or specified by us according to LAT procedures and requirements. • LAT Tracker controls all design drawings and specifications. • Development of the processes for fabrication and assembly of the custom LAT designs was accomplished by close collaboration between LAT institutes and the commercial vendors. • Final Tracker tower-module assembly and test will be accomplished in the clean-room facilities at INFN Pisa.
Tracker Test Program • High yield at the tray and tower levels requires an aggressive test program through all steps of the assembly: • Receiving and inspection of the SSDs (Presentation 6B) • Testing of assembled SSD ladders (6C) • Testing and screening of ICs (5D) • Testing and screening of other EEE parts (5B) • Testing and burn-in of MCM electronics modules (6E) • Testing of assembled composite panels (6D) • Testing of MCMs on trays prior to ladder attachment (6F) • Testing of completed trays (7D) • Cosmic-ray testing of stacked trays (7D) • Testing of assembled towers (7E)
Tracker Status Snapshot • Document list: see the TKR web site for links into Cyberdocs: • http://www-glast.slac.stanford.edu/Tracker-Hardware/latdocs.html • Subsystem Requirements Documents • Level-III: LAT-SS-00017 (released) • Level-IV: LAT-SS-00134, LAT-SS-00152 (both released) • Subsystem Interface Control Documents • Mechanical: LAT-SS-00138 (released) • Electrical: LAT-SS-00176 (released) • Interface Definition Drawing: LAT-DS-00851 (draft) • Design Drawings of Flight Hardware. See the Tracker drawing tree: • http://www-glast.slac.stanford.edu/Tracker-Hardware/TKR_drawing_tree.html • ~80 Drawings; ~40 Released • Drawings of assembly fixtures • http://www-glast.slac.stanford.edu/Tracker-Hardware/tooling.html • EEE Parts List: all but one parts (or procurement specs) are approved. • LAT-TD-00179
Tracker Status Snapshot • Materials List: complete, but evaluation of some composites and adhesives is still in progress. • LAT-SS-00172 • Mechanical Design (see Presentation 2D for details) • Mid trays: design complete, released; EM versions fabricated • Top tray: design complete, released; EM version in fabrication • Bottom tray and flexures: design complete; EM version in fab • Sidewalls: design complete; YS90 versions are available; K13d material on order • Thermal straps: conceptual design; details in progress • Modeling and Analysis • B allowables from testing are now included (with YS90 values for the sidewalls) • positive margin everywhere • A reduced model has been delivered to the LAT
Tracker Status Snapshot • Electronics design (see Presentation 2A for details) • PWB and pitch-adapter flex: designs are complete, with final prototypes under test and the release process in progress. • ASICs: designs complete and released. Wafers have already been procured, several chips have been successfully tested, and production probe testing is ready to commence. • Flex-circuit cables: designs are complete. EM versions and burn-in system cables are in hand. • Bias circuit: design is complete. The final prototypes are being evaluated. • SSD Design: complete and released, with procurement, including testing, in progress (Presentations 5C and 6B).
Tracker Status Snapshot • SSD Ladder Assembly (Presentation 6C) • PRR completed for the primary vendor • >250 flight ladders have been fabricated and tested • MCM Assembly (Presentation 6E) • All fixtures and procedures have been developed • Lessons learned in EM assembly are being applied to improve the procedures to increase the yield and quality • A PRR will be held around early June • Composite Panel Assembly (Presentation 6D) • All procedures and fixtures have been developed and tested for mid trays and top trays (only slight variations are needed for the bottom trays—in progress) • Testing and acceptance procedures are developed and tested • A PRR will be held in mid April
Tracker Status Snapshot • Tray Assembly (Presentation 6F) • Includes mounting of SSDs and MCMs onto composite panels. • Tooling and procedures were very recently tested on the EM to produce functional trays. A few lessons from that experience are being applied to finalize those procedures. • Tower Assembly (Presentation 6G) • Preliminary tooling was tested with the early prototype tower • Improved tooling is being designed for EM and flight tower assembly. • Test Procedures (Section 7) • Testing at low levels of integration is well developed and has been applied to the Engineering Model. • More experience is now being gained at the tower-module level, with the Engineering-Model functional mini-tower and the mechanical/thermal tower.