50 likes | 126 Views
LogicVision Approach for Memory Access. Operations (Read, Write, ReadModifyWrite),…are Grouped into Sets Called OperationSet Within an OperationSet there can be Several Operations defined Operation(Read) Operation(Write) Etc. Each Operation can Include one or more “Tick”s
E N D
LogicVision Approach for Memory Access • Operations (Read, Write, ReadModifyWrite),…are Grouped into Sets • Called OperationSet • Within an OperationSet there can be Several Operations defined • Operation(Read) • Operation(Write) • Etc. • Each Operation can Include one or more “Tick”s • A “Tick” is a Clock Cycle • Within a Tick Control Signals can be set ON or OFF • Control Signals are used to control the Memory Operation • A memory can have Multiple OperationSets • OperationSets are Derived from the Memory Data Sheet • OperationSet is Independent of the Timing Waveform
OperationSets • OperationSet (<operationSetName>) { Operation (Read | ReadModifyWrite | Write | { Tick(tickNumber) { Data: Pattern | (Z); OutputEnable: On | (Off); ReadEnable: On | (Off); StrobeDataOut; WriteEnable: On | (Off); . . } //end of Tick wrapper . . //Repeat this syntax until you define all the clock cycles . //(ticks) in the operation. } . . //Repeat this syntax until you define all the operations . //in the operation set. } //end of OperationSet wrapper
Example • OperationSet (Sync) { Operation (Write) { Tick { WriteEnable:On; } Tick { } } Operation (Read) { Tick { ReadEnable: On; } Tick { ReadEnable: On; StrobeDataOut; } } Operation (ReadModifyWrite) { Tick { ReadEnable: On; } Tick { WriteEnable:On; ReadEnable: Off; StrobeDataOut; } } }
test_clock addr dout don’t care rwb csb oeb Defining the Read Cycle read_cycle ( change addr; assert csb; assert oeb; wait; assert csb; assert oeb; wait; expect dout; wait; ) Strobe d_out
test_clock addr din don’t care rwb csb oeb Defining the Write Cycle write_cycle ( change addr; change din; assert csb; assert rwb; assert oeb; wait; assert csb; assert rwb assert oeb; wait; )