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Generating minimum transitivity constraints in P-time for deciding Equality Logic. Ofer Strichman and Mirron Rozanov Technion, Haifa, Israel. Equality Logic. A Boolean combination of equalities ( x 1 = x 2 Æ ( x 2 = x 3 Ç x 1 x 3 )) x 1 , x 2 , x 3 2 N
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Generating minimum transitivity constraints in P-time for deciding Equality Logic Ofer Strichman and Mirron Rozanov Technion, Haifa, Israel Technion
Equality Logic • A Boolean combination of equalities (x1 = x2Æ (x2=x3Çx1x3)) x1,x2,x32N • Typically combined with Uninterpreted Functions (EUF) • The decision problem for Equality Logic: NP – C Technion
Basic notions E: x = yÆy = zÆzx (non-polar) Equality Graph: y x z Gives an abstract view of E Technion
From Equality to Propositional LogicBryant & VelevCAV’00 – the Sparse method x1 E :x1 = x2Æx2 = x3Æx1x3 sk : e1,2 Æe2,3Æ:e1,3 • Encode all edges with Boolean variables • This is an abstraction • Transitivity of equality is lost! • Must add transitivity constraints! e1,2 e1,3 x2 e2,3 x3 Technion
From Equality to Propositional LogicBryant & VelevCAV’00 – the Sparse method x1 E :x1 = x2Æx2 = x3Æx1x3 sk : e1,2 Æe2,3Æ:e1,3 • Transitivity Constraints: For each cycle of size n, forbid a true assignment to n-1 edges T S = (e1,2Æe2,3!e1,3) Æ (e1,2Æe1,3!e2,3) Æ (e1,3Æe2,3!e1,2) Check: skÆTS e1,2 e1,3 x2 e2,3 x3 Technion
From Equality to Propositional LogicBryant & VelevCAV’00 – the Sparse method • Thm-1: It is sufficient to constrain chord-free simple cycles • There can be an exponential number of chord-free simple cycles… T e2 T e5 T e1 F e3 F e4 T Technion
From Equality to Propositional LogicBryant & VelevCAV’00 – the Sparse method • Make the graph ‘chordal’. • In a chordal graph, it is sufficient to constrain only triangles. • Polynomial # of edges and constraints. • # constraints = 3 £ #triangles Technion
An improvementReduced Transitivity Constraints (RTC) • So far we did not consider the polarity of the edges. • Assuming E is in Negation Normal Form E: x = yÆy = zÆzx y (polar) Equality Graph: = = x z Technion
z = = e3 e1 y x e2 An improvementReduced Transitivity Constraints (RTC) • Here, T R = e3Æe2!e1 is sufficient • This is only true because of monotonicity of NNF Allowing e.g. :x = z, x = y, zy F T ’:x = z, x = y, z = y T T Technion
Definitions • Dfn-1: A contradictory cycle is a cycle with exactly one disequality edge. • Dfn-2: A contradictory Cycle C is constrainedunder T if T does not allow an assignment in which dashed edges are True and the solid edge is False. T T C = T T F Technion
Main theorem • Let T R be a conjunction of transitivity constraints. • If T Rconstrains all simple contradictory cycles then E is satisfiable iff skÆT R is satisfiable The Equality Formula Technion
Proof strategy for the main theorem • () Proof strategy: • LetRbe a satisfying assignment toskÆT R • We will construct Sthat satisfies skÆT S • From this we will conclude thatEis satisfiable Skip proof Technion
Transitivity: 5 constraints RTC: 0 constraints T Transitivity: 5 constraints RTC: 1 constraint T T T F Technion
Applying RTC • How can we use the theorem without enumerating contradictory cycles ? • Answer: • Consider the chordal graph. • Still – which triangles ? in which direction? Technion
Our CAV’05 solution • Exp # cycles to traverse. • Solution: Stop before adding an existing constraint • With a cost: must constrain non-simple cycles as well. x2 x0 x4 cache: e0,2 Æe1,2 e0,1 e1,3 Æe2,3 e1,2 e2,4 Æe3,4 e2,3 e4,5 Æe3,5 e3,4 x1 x5 x3 Technion
x7 Constraining simple contradictory cycles • Focus on each solid edge es separately • - (find its dashed Bi-connected component) 2. Make the graph chordal x2 x0 x4 es x1 x5 x3 x6 Do we need: e5,6Æ e3,6! e3,5 ? Technion
Constraining simple contradictory cycles x2 x0 x4 es x1 x5 x3 x6 yes! Do we need: e5,6Æ e3,6! e3,5 ? Do we need: e3,5Æ e3,6! e5,6 ? Technion
Constraining simple contradictory cycles 3. Remove a vertex xkthat leans on an edge (xi,xj) 4. Is (xi,xj) on a simple cycle with es? O(|E|) 5. If yes, add (ek,iÆ ek,j! ei,j) e5,6 Æe3,6 e3,5 x2 x0 x4 es x1 x5 x3 x6 Technion
Constraining simple contradictory cycles • Remove a vertex vk that leans on an edge (vi,vj) • Does (vi,vj) on the same simple cycle with es? • If yes, add (ek,iÆ ek,j! ei,j) e5,6 Æe3,6 e3,5 x2 x0 x4 es x1 x5 x3 x6 Technion
Random graphs (Satisfiable) Technion
Results – random graphs V=200, E=800, 16 random topologies # constraints: reduction of 17% Run time: reduction of 32% Technion
Results – random graphs V=200, E=800, 16 random topologies # constraints: reduction of 17% Run time: reduction of 32% Technion
A crafted example 2n assignments satisfysk. None satisfy the theory. Technion
ResultsUclid benchmarks* (all unsat) * Results strongly depend on the reduction method of Uninterpreted Functions. Technion
Possible refutations of CNF’s generated by Sparse Transitivity constraints Boolean Encoding Æ T S B B T R P3 P2 P0 P4 T S – T R P1 P2 Constraints of the form e1Æ e2! e3 A P3 proof exists according to the main theorem. Hypothesis: (T S – T R) clauses hardly participate in the proof Thm: B is satisfiable !B Æ (T S – T R) is satisfiable Technion
B T R Average on: 10 graphs, ~890K clauses All Unsat Sparse: ~ 22 sec. RTC: ~ 12 Sec. T S- T R B T R B – Boolean encoding T R –RTC constraints T S –Sparse constraints T S- T R Technion
Summary • The RTC method is ~dominant over the Sparse method. • Open issue: find a P-time algorithm that exploits the full power of the main theorem. Technion
Example: Circuit Transformations Stage 1 • A pipeline processes data in stages • Data is processed in parallel – as in an assembly line • Formal Model: Stage 2 Stage 3 Technion
Example: Circuit Transformations • The maximum clock frequency depends on the longest path between two latches • Note that the output of g is usedas input to k • We want to speed up the design by postponing k to the third stage Technion
Validating Circuit Transformations ? = Technion
Source program z= (x1+y1) (x2+y2); Target program u1=x1+y1;u2=x2+y2;z=u1u2 ; Validating a compilation process Compilation • Need to prove that:(u1=x1+y1 u2=x2+y2 z=u1u2) $z= (x1+y1) (x2+y2) Source Target Technion
Validating a compilation process • Target program u1=x1+y1;u2=x2+y2;z=u1u2 ; • Source program z= (x1+y1) (x2+y2); Compilation • Need to prove that:(u1=x1+y1 u2=x2+y2 z=u1u2) $z= (x1+y1) (x2+y2) g1 f1 f2 f1 f2 g2 Technion
Need to prove that:(u1=x1+y1 u2=x2+y2 z=u1u2) $z= (x1+y1) (x2+y2) g1 f1 f2 f1 f2 g2 Validating a compilation process • Instead, prove: under functional consistency: for every uninterpreted function fx = y!f(x) = f(y) • Which translates to (via Ackermann’s reduction): Technion
Definitions for the proof… • A Violating cycle under an assignment R: • This assignment violates T S but not necessarily T R Either dashed or solid eT1 F T eF T eT2 Technion
More definitions for the proof… • An edge e = (vi,vj) is equal under an assignment iff there is an equality path between vi and vj all assigned T under . Denote: v3 T F T v1 v2 T T Technion
More definitions for the proof… • An edge e = (vi,vj) is disequal under an assignment iff there is a disequality path between vi and vj in which the solid edge is the only one assigned false by . Denote: v3 T F T v1 v2 T T Technion
v3 F T T v1 v2 Proof… • Observation 1:The combinationis impossible if = R(recall:R²T R) • Observation 2: if (v1,v3) is solid, then Technion
Type 1: It is not the case that Assign S (e23) = F Type 2: Otherwise it is not the case that Assign (e13) = T ReConstructing S v3 v3 F F T T T F T T v1 v1 v2 v2 In all other casesS = R Technion
ReConstructing S • Starting from R, repeat until convergence: • (eT) := F in all Type 1 cycles • (eF) := T in all Type 2 cycles • All Type 1 and Type 2 triangles now satisfy T S • B is still satisfied (monotonicity of NNF) • Left to prove: all contradictory cycles are still satisfied Technion
T T Proof… • Invariant: contradictory cycles are not violating throughout the reconstruction. • contradicts the precondition to make this assignment… v3 F T F T v1 v2 Technion
T F Proof… • Invariant: contradictory cycles are not violating throughout the reconstruction. • contradicts the precondition to make this assignment… v3 F T T T v1 v2 Technion
Constraining simple contradictory cycles The constraint e3,6 Æe3,5 e5,6is not added cache: … e5,6 Æe4,6 e4,5 x2 x0 x4 x1 x5 x3 x6 Open problem: constrain simple contradictory cycles in P time Technion
Constraining simple contradictory cycles the constraint e3,6 Æe3,5 e5,6is not added, though needed Suppose the graph has 3 more edges Here we will stop, although … cache: … e5,6 Æe4,6 e4,5 x2 x0 x4 x1 x5 x3 x6 Open problem: constrain simple contradictory cycles in P time Technion