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Pixel Area Detector Development at NSRRC

Pixel Area Detector Development at NSRRC. Kuan-Li Yu, Te-Hui Lee, Hui-Fang Chuang, Hsin-Wei Chen, Chao-Chih Chiu, Duan-Jen Wang 2011/06/13. Outlines. Sensor ASIC: preamp, comparator, counter Bump bonding Readout system Timing control Interlock Data transfer and display.

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Pixel Area Detector Development at NSRRC

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  1. Pixel Area Detector Development at NSRRC Kuan-Li Yu, Te-Hui Lee, Hui-Fang Chuang, Hsin-Wei Chen, Chao-Chih Chiu, Duan-Jen Wang 2011/06/13

  2. Outlines • Sensor • ASIC: preamp, comparator, counter • Bump bonding • Readout system • Timing control • Interlock • Data transfer and display

  3. Operation Principle

  4. Background Knowledge • We started from scratch since 2009. • We learned sensor design from BNL. • We learned microstrip detector installation and operation from D. Peter Siddons at BNL.

  5. General Specification

  6. Sensor

  7. Sensor Structure

  8. Sensor Wafer 6 inches

  9. ASIC

  10. ASIC • ASIC is designed by outsourcing t-WIN Technology Service Inc and manufactured by MXIC. • http://www.t-win.com.tw • Analog Front End (AFE) • Preamp, shaper • High-pass filter • DAC, comparator • Pseudo Random Counter (PRC) • Serial Peripheral Interface (SPI) • Parameters settings • Counter values reading

  11. Requirements of Analog Front End • CS amplifier and shaper • Input: 50 nA/10 ns = 0.5 fC (10 keV photons) • Output: amplification 2 V/fC • Power consumption = 24 uW • Operation current = 8 uA@3 V • Time response < 1 us • Implementation area 4,000 um2 • Radiation hardened • Low Equivalent Noise Charge (ENC)

  12. Input current pulse Output signal

  13. AFE Test IC Preamp + shaper Preamp + shaper + comparator 2.8 mm One pixel 2.8 mm

  14. Pixel Circuit Analog Front End (AFE) Pseudo Random Counter (PRC) Serial Peripheral Interface (SPI)

  15. Analog Front End (AFE) Amplification selection preamp shaper Threshold DAC comparator

  16. Pseudo Random Counter (PRC) Overflow detection

  17. Pseudo Random Counter (PRC) 20-bit counting mode 20-bit reading mode Used=1,048,575,CLKNUM=1,048,576, 99.999905%, Last=0X7FFFF, First=0XFFFFF FFFFF(0),FFFFE(1),FFFFC(2),FFFF8(3),FFFF1(4),FFFE3(5),FFFC7(6),FFF8E(7),FFF1C(8),FFE38(9),FFC71(10),FF8E3(11),FF1C7(12),FE38E(13),FC71C(14),F8E38(15),F1C71(16),E38E3(17), …., 7FFFF

  18. Pixel Layout 170 um PRC SPI 170 um AFE

  19. Power Consumption Estimation • AFE : • CSA(9)+SHP(9)+CMP(7.5)+BIAS(4.5)+DAC(4.5) = 35 uA  • SPI  : • 60 uA when clock running • PRC : • 30 uA  when clock running • Total working current/pixel: 40 uA ~ 50 uA • Power Consumption • 45 x 106 x 94 x 8 = 3.587 A • 3.587 A x 3 V = 10.76 W • 10.76 W/(66 mm x 38.3 mm) = 0.42 W/cm2

  20. Power Management in One Pixel • Counting mode • AFE ON, PRC ON, SPI OFF • Reading mode • AFE OFF, PRC ON, SPI ON • Standby mode • AFE OFF, PRC OFF, SPI OFF

  21. Bump Bonding Process

  22. Bump Bonding Platform microscope load cell prism Vacuum chuck

  23. Control computer Motor controller

  24. Readout System

  25. Readout System

  26. Serial Control Board (SCB) Indium

  27. Memory Control Board (MCB)

  28. Timing Control Board (TCB) • Power supply to MCB and SCB • Data transfer timing and exposure time control • Synchronization of all modules • Interlock signal monitoring • Cooling water flow and temperature • HV bias leakage current • SCBs temperature monitoring • HV bias voltage supply and control

  29. Image Data Transfer • High pulsatile data rate is converted to sustained slower data rate by FIFO memory Data rate time

  30. MCB Timing Control SCB to MCB Write data to FIFO 20-bit PRC decode 1 usec

  31. Data Transfer Speed • Serial to parallel conversion speed • 20 MHz x 8 =160 Mbps • PRC decoding speed • 16-bit PRC = 16 bit/125 ns = 128 Mbps • 20-bit PRC = 20 bit/200 ns = 100 Mbps • National Instruments (NI) PCIe 6537 parallel interface • 16 bit x 50 MHz/4 MCB = 200 Mbps • Estimated data transfer time for one module • 203,300 / 20,000,000 * 1.5 ≒ 15.2 ms (20-bit) • 162,640 / 20,000,000 * 1.5 ≒ 12.2 ms (16-bit)

  32. Image Viewer (FITS)http://fits.gsfc.nasa.gov/ Combine and Display SAMBA Report received images Start count Image

  33. Develop a device support for areaDetector module tpsDetector Write a driver inherits from ADDriver

  34. Schedule • July 2011: AFE Test IC • Dec. 2011: Single operational module • Aug. 2012: Integrated 40 modules • Dec. 2012: Integrated with EPICS control

  35. Thank you for your attention.

  36. Serial Control Board (SCB) • Mechanical support for ASIC and sensor • Wire bonding with ASIC • Thermal conduction for ASIC heat dissipation

  37. Memory Control Board (MCB) • SCB ASIC parameter settings • Serial to parallel signal conversion engine • FIFO data flow control • Pseudo Random Counter (PRC) • Lookup table generation • Hardware decode (20-bit, 200 ns) • SCB and ASIC temperature monitoring

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