CMOS VLSI Design CMOS Transistor Theory

1. CMOS VLSIDesignCMOS Transistor Theory

2. Outline • Introduction • MOS Capacitor • nMOS I-V Characteristics • pMOS I-V Characteristics • Gate and Diffusion Capacitance • Pass Transistors • RC Delay Models

3. Introduction • So far, we have treated transistors as ideal switches • An ON transistor passes a finite amount of current • Depends on terminal voltages • Derive current-voltage (I-V) relationships • Transistor gate, source, drain all have capacitance • I = C (DV/Dt) -> Dt = (C/I) DV • Capacitance and current determine speed • Also explore what a “degraded level” really means

4. MOS Capacitor • Gate and body form MOS capacitor • Operating modes • Accumulation • Depletion • Inversion Accumulation Depletion Inversion

5. Terminal Voltages • Mode of operation depends on Vg, Vd, Vs • Vgs = Vg – Vs • Vgd = Vg – Vd • Vds = Vd – Vs = Vgs - Vgd • Source and drain are symmetric diffusion terminals • By convention, source is terminal at lower voltage • Hence Vds 0 • nMOS body is grounded. First assume source is 0 too. • Three regions of operation • Cutoff • Linear • Saturation

6. nMOS Cutoff • No channel • Ids = 0 • No channel formed until Vgs > Vt

7. nMOS Linear • Channel forms • Current flows from d to s • e- from s to d • Ids increases with Vds • Similar to linear resistor Vds = Vd – Vs = Vgs - Vgd The larger the Vds, the smaller the Vgd

9. nMOS Saturation • Channel pinches off, when Vgd < Vt, no surface inversion near the drain. • Ids independent of Vds • We say current saturates • Similar to current source Vds = Vd – Vs = Vgs – Vgd Saturation occurs when Vds > Vgs – Vt Vsat = Vgs – Vt Vds > Vsat

10. I-V Characteristics • In Linear region, Ids depends on • How much charge is in the channel? • How fast is the charge moving?

11. Channel Charge • MOS structure looks like parallel plate capacitor while operating in inversion • Gate – oxide – channel • Qchannel =

12. Channel Charge • MOS structure looks like parallel plate capacitor while operating in inversion • Gate – oxide – channel • Qchannel = CV • C =

13. Channel Charge • MOS structure looks like parallel plate capacitor while operating in inversion • Gate – oxide – channel • Qchannel = CV • C = Cg = eoxWL/tox = CoxWL • V = Cox = eox / tox capacitance per unit area

14. Channel Charge • MOS structure looks like parallel plate capacitor while operating in inversion • Gate – oxide – channel • Qchannel = CV • C = Cg = eoxWL/tox = CoxWL • V = Vgc – Vt = (Vgs – Vds/2) – Vt Vc = ½(Vs+ Vd) = Vs- ½(Vs) + ½(Vd) Vgc= Vg-Vc = Vg- Vs – ½(Vds) Cox = eox / tox Vt used to create inversion layer

15. Carrier velocity • Charge is carried by e- • Carrier velocity v proportional to lateral E-field between source and drain • v =

16. Carrier velocity • Charge is carried by e- • Carrier velocity v proportional to lateral E-field between source and drain • v = mE m called mobility • E =

17. Carrier velocity • Charge is carried by e- • Carrier velocity v proportional to lateral E-field between source and drain • v = mE m called mobility • E = Vds/L • Time for carrier to cross channel: • t =

18. Carrier velocity • Charge is carried by e- • Carrier velocity v proportional to lateral E-field between source and drain • v = mE m called mobility • E = Vds/L • Time for carrier to cross channel: • t = L / v

19. nMOS Linear I-V • Now we know • How much charge Qchannel is in the channel • How much time t each carrier takes to cross

20. nMOS Linear I-V • Now we know • How much charge Qchannel is in the channel • How much time t each carrier takes to cross

21. nMOS Linear I-V • Now we know • How much charge Qchannel is in the channel • How much time t each carrier takes to cross Q = CV, t = L/v

22. nMOS Saturation I-V • If Vgd < Vt, channel pinches off near drain • When Vds > Vdsat = Vgs – Vt • Now drain voltage no longer increases current

23. nMOS Saturation I-V • If Vgd < Vt, channel pinches off near drain • When Vds > Vdsat = Vgs – Vt • Now increasing drain voltage no longer increases current

24. nMOS Saturation I-V • If Vgd < Vt, channel pinches off near drain • When Vds > Vdsat = Vgs – Vt • Now increasing drain voltage no longer increases current

25. nMOS I-V Summary • Shockley 1st order transistor models

26. Example • Assuming using a 0.6 mm process • From AMI Semiconductor • tox = 100 Å • m = 350 cm2/V*s • Vt = 0.7 V • Plot Ids vs. Vds • Vgs = 0, 1, 2, 3, 4, 5 • Use W/L = 4/2 l

27. pMOS I-V • All dopings and voltages are inverted for pMOS • Mobility mp is determined by holes • Typically 2-3x lower than that of electrons mn • 120 cm2/V*s in AMI 0.6 mm process • Thus pMOS must be wider to provide same current • In this class, assume mn / mp = 2

28. Capacitance • Any two conductors separated by an insulator have capacitance • Gate to channel capacitor is very important • Creates channel charge necessary for operation • Source and drain have capacitance to body • Across reverse-biased diodes • Called diffusion capacitance because it is associated with source/drain diffusion

29. Gate Capacitance • Approximate channel as connected to source • Cgs = eoxWL/tox = CoxWL = CpermicronW; where Cpermicron = CoxL = ox/tox L • Cpermicron is typically about 2 fF/mm

30. Diffusion Capacitance • Csb, Cdb due to reverse biased p-n junction between source and body; between drain and body. • Undesirable, called parasitic capacitance • Capacitance depends on area and perimeter • Make diff area small • Comparable to Cg for contacted diff • ½ Cg for uncontacted • Varies with process Continue Section 2.3, 2.4, on white board contacted diff uncontacted diff