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VLSI Implementations of Threshold Logic— A Comprehensive Survey

VLSI Implementations of Threshold Logic— A Comprehensive Survey. Speaker: Chen-Yu Lin Date: 4/21/2014. Outline. Pure CMOS MAJORITY function NULL Convention Logic Complementary Pass-transistor Logic Capacitive Threshold Logic Conductance/Current Implementations Pseudo nMOS

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VLSI Implementations of Threshold Logic— A Comprehensive Survey

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  1. VLSI Implementations of Threshold Logic—A Comprehensive Survey Speaker: Chen-Yu Lin Date: 4/21/2014

  2. Outline • Pure CMOS • MAJORITY function • NULL Convention Logic • Complementary Pass-transistor Logic • Capacitive Threshold Logic • Conductance/Current Implementations • Pseudo nMOS • Output-Wired Inverters

  3. MAJORITY Function

  4. MAJORITY Function • low power consumption • large noise margins • larger fan-in gates are slow

  5. NULL Convention Logic • low power • large noise margins • fast for small fan-ins

  6. Complementary Pass-transistor Logic • low power • pass-transistor

  7. Capacitive Threshold Logic • large fan-in capability • large delay • large area • power consumption

  8. Pseudo-nMOS • much faster • smaller • reduced noise margin • high power consumption

  9. Output-Wired Inverters • much faster • smaller • reduced noise margin • high power consumption

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