1 / 9

Round Table on Pixel Time Stamping Panel M Battaglia (CERN and LBNL) Y Arai (KEK)

Round Table on Pixel Time Stamping Panel M Battaglia (CERN and LBNL) Y Arai (KEK) M Campbell (CERN) HG Moser (MPI) W Snoeys (CERN). Round Table on Pixel Time Stamping Physics and Detector Requirements M Battaglia. Main Requirement & Constraints for Pixel Sensors at CLIC.

nasya
Download Presentation

Round Table on Pixel Time Stamping Panel M Battaglia (CERN and LBNL) Y Arai (KEK)

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Round Table on Pixel Time Stamping Panel M Battaglia (CERN and LBNL) Y Arai (KEK) M Campbell (CERN) HG Moser (MPI) W Snoeys (CERN)

  2. Round Table on Pixel Time Stamping Physics and Detector Requirements M Battaglia

  3. Main Requirement & Constraints for Pixel Sensors at CLIC • Pixel Size • - track extrapolation resolution & spatial granularity • Time stamping • - time granularity • Sensor Thickness • - material budget • Power Dissipation • - material budget

  4. Space Granularity Track Extrapolation Resolution sIP Given CLIC constraints this can be achieved with a multi-layered VTX with single point resolution ~ 3 mm, i.e. a ~ 10 mm binary pixel or a 15-20 mm analog pixel with charge interpolation 5-20 mm pixel pitch appears feasible for CCDs and monolithic active pixels in various technologies and architectures, is/will be possible to implement fast time-stamping capabilities in such small footprint ?

  5. Space and Time Granularity Occupancy from Pair Background Hit Density on VTX vs time from start of train GuineaPig +MOKKA G4 Simulation

  6. Space and Time Granularity Occupancy from Pair Background Train Occupancy vs. Pixel Size Occupancy vs. Time Stamping Full 150 ns train 20 mm pixel

  7. Space and Time Granularity Occupancy from Pair Background Expect 0.06 hits/mm2/BX, but depending on technology and layout each hit involves few to > 10 pixels 20 mm pixel, depleted sensitive volume w/ average cluster size 2.5 pixels, single hit efficiency 99.5%. Plot efficiency for reco tracks fulfilling quality cuts given below: Clusters in CMOS 15 mm Pixels due to low energy electrons from 1.5 GeV e-beam on Al scraper at LBNL ALS MOKKA G4 Simulation + Marlin Reconstruction No outlier hits c2/ndf < 7.5 pt>0.15 GeV Overlay pair hits to 3 TeVe+e- events and study standalone VTX pattern recognition efficiency/purity vs time stamping.

  8. Time Granularity: Energy in e+e- event from ggg hadrons background Degradation of physics signal as function of background integrated in the detector (MOKKA G4 Simulation + Marlin Reconstruction) 0.5 ns 5 ns 10 ns 20 ns Preliminary results of full G4+reco analyses indicate physics performance impacted for Dt > 10-15 ns

  9. T(0C) IR Camera Image Air Cooling Test Thin Chips Heating cable (80mW/cm2) Material Budget: Power Dissipation and Cooling Material minimisation dictates passive cooling, Preliminary tests with thin monolithic CMOS sensors on CFC ladder support structure in collaboration with STAR HFT indicate that 1-3 m/s airflow removes 70-100 mW/cm2 without inducing large vibrations. Assuming power dissipation to be concentrated at the end of column, 20 mm pixels and 1 cm column height, this corresponds to a limit of ~0.15 mW/column This power budget appears to be realistic for a variety of monolithic pixel sensor technology, but is/will this be feasible when including time-stamping capabilities ? Is power pulsing at 50 Hz an option ?

More Related