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2010. Emerging Memory Technologies for Reconfigurable Routing in FPGA Architecture. Fabien Clermidy P.E Gaillardon, H. Ben Jamaa, G. Beneventi, L. Perniola CEA, LETI, Minatec Campus Grenoble, France. FPGA Market. About 90% of market controlled by SRAM-based FPGA
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2010 Emerging Memory Technologies for Reconfigurable Routing in FPGA Architecture Fabien Clermidy P.E Gaillardon, H. Ben Jamaa, G. Beneventi, L. Perniola CEA, LETI, Minatec Campus Grenoble, France
Emerging memories for FPGA FPGA Market • About 90% of market controlled by SRAM-based FPGA • Long set-up time • Large power consumption • Non-volatile FPGA opportunities • Instant power up • Data integrity • low power modes Small niche applications : Space, Defense Low Price Or high Capacity High Price Low Capacity
Emerging memories for FPGA FPGA architecture: where to play? Ahmed et al., 2001 Logic element = CLB Lin et al., 2007 Interconnections = Switch box
Emerging memories for FPGA PCRAM opportunities Density equivalent to DRAM 5 order of magnitudes more write/erase cycles Good perspectives of write/erase cycles
Emerging memories for FPGA Outline • Context • Phase Change Memories overview • FPGA application • Conclusion
Emerging memories for FPGA Phase-Change RAM principle Tmelt TX Polycrystal Amorphous tQUENCH > 100 ns tQUENCH < 10 ns • Material with 2 stable phases • Chalcogenide alloys : GST, GeTe, … • Hysteresis cycle between 2 states • Transition by Joule heating Polycrystal Amorphous Reversible Phase Change High conductivity Low conductivity
Emerging memories for FPGA The Phase-Change RAM structure Crystalline chalcogenide Active region Heater • Electrodes • Heater Control the current density Improve Joule heating • Contact • Back-End compatibility • PC material deposited at BE temperatures • Possible integration in BEOL or in metal layers
Emerging memories for FPGA The Phase-Change RAM opportunities Non-volatility Low Cost Phase-Change Memories Low “On” resistance 3D technology PCM as high performance switch PCM as configuration point Size reduction Delay reduction
Emerging memories for FPGA In N In N North In W In E East West In W In E South In S In S Switch box using PCM • Resistive memories are replacing pass gates + configuration point
Emerging memories for FPGA Programming • Complex programming units needed • But shared with many switch boxes In N In N In 3 - state Out 3 - state MUX Iprog In W Sel En In E Sel Programming Programming unit unit In S In S Tmelt TX Amorphous tQUENCH > 100 ns tQUENCH < 10 ns Polycrystal
Emerging memories for FPGA Comparison with Flash and SRAM • Switch box with its configuration memory • Write time • Extracted from ITRS • Depends mainly on heater structure
Emerging memories for FPGA Replacing other configuration points? • Can’t be used as a flash point • Proposal: structure of voltage divider • 2 Resistive Elements between power lines • Configuration selector • Output node drive a gate load
Emerging memories for FPGA Configuration point: operations • Read operation is intrinsic • Write operation is active • Read • Mem 1 Polycrystal • Mem 2 Amorphous • Addressing transistor Off • Power lines Vdd, Vss • Voltage divider • Write • Power lines Connection to programming unit • Addressing transistor On • Mem programming
Emerging memories for FPGA Comparison with Flash and SRAM • Area: 30% gain • Flash = large programming MOS transistor • Lithographic pitch for contacts • Write time • Extracted from ITRS • Depends on heater structure
Emerging memories for FPGA FPGA architecture: Final view Ahmed et al., 2001
Emerging memories for FPGA FPGA architecture: results • CLB Area reduction 13% • Average Delay reduction 44% -Lower “On” resistance Toolflow : ABC – T-VPACK - VPR
Emerging memories for FPGA Conclusion • Phase-Change RAM is an option to consider for FPGA design • Both switch boxes and configuration memories • Non-volatility is another aspect which can induce further improvements
Emerging memories for FPGA Questions?