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Some PCB Layout Issues

Some PCB Layout Issues. Ground Bounce. 500 mV. GND. V CCI Noise. 500 mV/DIV. V CCA Noise. 500 mV/DIV. AD Bus Signal Quality. 500 mV/DIV. V CCA /V CCI Noise Measurements. Original layout pattern for an FPGA implementing a PCI core.

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Some PCB Layout Issues

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  1. Some PCB Layout Issues

  2. Ground Bounce 500 mV GND

  3. VCCI Noise 500 mV/DIV

  4. VCCA Noise 500 mV/DIV

  5. AD Bus Signal Quality 500 mV/DIV

  6. VCCA/VCCI Noise Measurements

  7. Original layout pattern for an FPGA implementing a PCI core.

  8. Original layout pattern for an FPGA implementing a PCI core. • Note: • Small trace width for these array power connections. • Via "islands" separating cap from FPGA

  9. VCCA Plane

  10. New FPGA Cap Layout

  11. New FPGA Cap Layout

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