70 likes | 215 Views
Politecnico di Torino. Dipartimento di Automatica e Informatica http://www.testgroup.polito.it. Dependability for digital systems. Di Carlo Stefano dicarlo@polito.it. People. Prof. Paolo Prinetto (Full Professor) Test Technology Technical Council (TTTC) chair of the IEEE Computer Society
E N D
Politecnico di Torino Dipartimento di Automatica e Informatica http://www.testgroup.polito.it Dependability for digital systems Di Carlo Stefano dicarlo@polito.it DeSire & DeFINE Workshop
People • Prof. Paolo Prinetto(Full Professor) • Test Technology Technical Council (TTTC) chair of the IEEE Computer Society • Eng. Alfredo Benso (Researcher) • Eng. Stefano Di Carlo(Assistant Researcher) • Eng. Giorgio Di Natale(Assistant Researcher) • Andrea Baldini, Luca Tagliaferri, Gianfranco Panico, Ivano Solcia, Alberto Bosio(PhD Students) • More than 15 thesis students DeSire & DeFINE Workshop
Test Group Scope • Built In Self Test (BIST) and Design for Testability (DfT) • From core to system test • Dependability and Fault tolerance w.r.t.: • Hardware permanent faults • Hardware transient faults (due to environmental stresses) • EDA tools developement DeSire & DeFINE Workshop
Test Group Scope: Technical Diversification SW Product Life Cycle Field Factory Design Board System Chip Core Levels of Integration DSP Memory Processor FPGA Technology DeSire & DeFINE Workshop
On going R&D funded projects • ICT Boella: TEST D.O.C. Quality and dependability of Complex SoC • ASI (Italian Space Agency): Dependability of COTS based systems • MIUR (Italian Ministry of Research and University) Legge 488: GRAAL: automatic generation highly dependable memories • EU VFP : EuNICE European Network for Initial and Continuing Education inVLSI/SOC Testing using remote ATE facilities DeSire & DeFINE Workshop
On going research contracts • Ansaldo (Italy) • ASSET Inc. (USA) • CISCO (USA) • Italtel s.p.a. (Italy) • Magneti Marelli (Italy) • Siemens ICN (Italy) • Yogitech (Italy) For a budget of ~150K €/year DeSire & DeFINE Workshop
Test Group & DeFINE • Design of highly dependable digital systems: • Intelligent techniques to target commercial components • Cooperation of hardware and software approaches to detect and correct for faults during operation • Low use of hardware and software redundancy or non-standard process technologies: • Low performance degradation • Low cost overhead DeSire & DeFINE Workshop