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This presentation discusses the Radix-22 algorithm, its structure, and procedure, with a focus on its application in a Matlab simulation for a 1024-point FFT. The presentation includes a design and correctness analysis of the Radix-22 structure and algorithm, as well as future work and references.
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95-1 Under-Graduate ProjectPaper Reading Presentation Speaker: 陳柏偉 許名宏 Advise: Prof. An-Yeu Wu Mentor: 陳彥良 Date: 2006/10/25
Outline • Radix-22 Algorithm • Radix-22 Structure • Procedure • Matlab Simulation
Radix-22 Algorithm • Define of DFT of size N: which
16 Points FFT BFI BFI BFII -1 -1 -1 -1 -1 -1 -1 -1 ? -1 -1 -1 -1 -1 -1 -1 -1
Time Domain to Frequency Domain • Bit reverse x(3) => X(12) 00 1 1 110 0 k3k2k1 …
Twiddle Factor for 64 Points & More • Twiddle factor • For 64 points: n3=0,1,2…,15 k1=0,1 k2=0,1 • Bit reverse x(16) => X(2) 010000 000010 • Also apply for 4n points
Matlab Simulation Array reg N-N/4 Clk => binary function
Array Register reg512(1:512)=0; reg256(1:256)=0; reg128(1:128)=0; reg64(1:64)=0; reg32(1:32)=0; reg16(1:16)=0; reg8(1:8)=0; reg4(1:4)=0; reg2(1:2)=0; reg1=0; 1024 = 210 “10” registers
BF2i & BF2ii Function if t==0 y(1:2)=[a b]; end if t==1 & s==1 y(1:2)=[a+(b) a-(b)]; end if t==1 & s==0 y(1:2)=[a+(b*-i) a-(b*-i)];
Clock binclk=dec2binvec(clk,bit);
Circuit Simulation wire1 = BF1(reg128, input, clk7); reg128 =wire12; wire2=BF2(reg64, wire11, clk7, clk6); reg64=wire22; output=wire21* W1(from3N/4);
Result – Design & Correct(2/2) | design – correct |< 7* 10-12
Conclusion • Radix-22 structure and algorithm • Radix-22 SDF FFT architecture • Matlab simulation 1024 points FFT
Future work • Verilog code • Synthesis • Other architecture
Reference • [1] S. He and M. Torkelson. A new approach to pipeline FFT processor. Proceedings of IPPS’96, 1996 • [2] discrete-time signal process 2nd edition A.V. Oppenheim R.W Schafer For matlab • http://webclass.ncu.edu.tw/~junwu/index.html • http://www.cs.nthu.edu.tw/~jang/mlbook/