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A Linux-based Software Environment for the Reconfigurable Scalable Computing Project. John A. Williams 1 (jwilliams@itee.uq.edu.au) Neil W. Bergmann 1 (n.bergmann@itee.uq.edu.au) Robert F. Hodson 2 (robert.f.hodson@nasa.gov) 1 The University Of Queensland, Australia
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A Linux-based Software Environment for the Reconfigurable Scalable Computing Project John A. Williams1 (jwilliams@itee.uq.edu.au) Neil W. Bergmann1 (n.bergmann@itee.uq.edu.au) Robert F. Hodson2 (robert.f.hodson@nasa.gov) 1 The University Of Queensland, Australia 2 NASA Langley Research Center 1
RSC Platform Architectural Overview • Collection of one or more modular stacks of computing elements • RPM is core reconfigurable component hosting reconfigurable FPGA fabric 2
RSC Embedded Processing • Primary target microprocessor is the MicroBlazeTM soft processor. • Design mitigated with XTMR tool (or manually) • Embedded Linux • No MMU -> uClinux • Provides easy path to high level development for instrument applications (C, sockets, file systems, etc) • Development environment similar (if not identical) to typical Linux desktop 3
RSC Software Environment • Why Linux? • Path for existing applications onto RSC • Standard platform improves design efficiency • Application development/debug • Multiprocessing/clustering • Software infrastructure • Interoperability • Networking • File systems • Desktop application prototyping “Linux is the C runtime” – D. Jeff Dionne 4
Software Multiprocessing Model • Message Passing Interface (MPI, MPI2) • Standardised protocol for message passing parallel computation • Strong uptake in terrestrial cluster computing community • Supports distributed (networked) clusters as well as shared memory machines • MPI on MicroBlaze and uClinux • Based on Argonne National Labs’ MPICH2 implementation • Start with MPICH on Linux TCP/IP stack • Migrate to higher performance implementation as RSC network architecture evolves 5
Hardware Multiprocessing Model • Reconfigurable Processing Module (RPM) • Application FPGA logic capacity (after TMR) • Two CPUs, support HW, system interconnect • Custom processing HW and IO cores • 512MB shared EDAC DRAM • Multiprocessing options • SMP Linux • Dual UP Linux (shared memory) • UP Linux + custom coprocessor • UP Linux + I/O processor • … 6
SDRAM Memory I/F Flash NIC Hardware Multiprocessing Model Application FPGA (Xilinx) Timer / INTC/ … CPU0 CPU1 Timer / INTC/ … Caches Bus I/F On-Chip PeripheralBus On-Chip PeripheralBus I/O core(s) I/O core(s) Custom core Custom core Custom core Custom core SLiP I/F Interface FPGA (Actel) On Chip Bus (Wishbone) PCI I/F 3.3V PCI 33MHz 32/64 bit 7
Status and outlook • OS and multiprocessing prototyping • COTS FPGA eval board • Insight-Memec V4LX25 + comms module • Dual ethernet, uart • 64MB DDR • UP Linux reference design completed • SMP feasibility study underway • Dual UP Linux • Dual MicroBlaze HW system built • Dual kernel bringup underway • MPICH2 port in progress • MPICH libraries integrated into uClinux build • Preliminary port of cluster process manager daemon 8
Status and outlook • COTS prototype cluster • 4 x dual CPU subsystems 9
Research questions • Impact of TMR on performance • How to represent custom HW in an MPI cluster • Coprocessor to CPU nodes? • Fully fledged MPI nodes / peers? • Application of standard Linux technologies for reliability and survivability • RAID ramdisks • Cluster node failover • Performance modeling and analysis • Rob Jones, RSC Co-I 10