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The Great I2C Mystery. The mystery. Occasionally, when accessing the I2C bus, the APVs are found not to respond correctly to I2C commands, actually they are stuck This is confirmed by Resetting the APV, after which they respond correctly. The theoretical waveforms. Ack Cycle. D0. D1. SCL.
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The mystery • Occasionally, when accessing the I2C bus, the APVs are found not to respond correctly to I2C commands, actually they are stuck • This is confirmed by Resetting the APV, after which they respond correctly
The theoretical waveforms Ack Cycle D0 D1 SCL SDA ↓ must occur after SCL ↓ SDA Driven by master Driven by slave Example for an I2C write cycle
The actual waveforms Ack Cycle D0 D1 SCL SCL ↓ before SDA↓ by a few ns SDA Driven by master Driven by slave
… on scope SDA SCL on FE-Hybrid
What we believe the APV believes Ack Cycle D0 D1 SCL ARRRGGGHHHH!!!!! SDA Driven by master Driven by slave
Present Electrical circuit FE-Hybrid 82W Parasitic on FE Hybrid CH SCL SDA AOH CH > CA Parasitic on AOH CA 82W
Proposed Electrical circuit FE-Hybrid 82W SCL SDA AOH > 3 KW
Solution • Replace the 82 ohm protection resistor to AOH (ONLY the one to the AOH !) with something like 3.3 K (Precise value to be confirmed after full Temp cycle tests !)
82->500 W and +47 pF on AOH SDA SCL on AOH SCL on FE-Hybrid