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Implement virtual memory scheme with two page replacement algorithms, analyze their performance varying the page size, and present results graphically for demo.
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Project Part 4 NOTE: You also need to pick two different page replacement algorithms and compare their performance as a function of the page size. Document the behavior of each under a given page size, and save the information to display graphically during the demo.
Notes on Project Part 4 • You should treat the ten 100 memory banks as one large contiguous global memory. • You should execute programs where the total memory requirements of the executing programs exceeds the physical memory. • Implement a virtual memory scheme that includes two page replacement algorithms. • Deliverables: • Hard copy of source code that is well documented and easy to follow. • Source code for BRAIN98 programs. • A write up describing the project, features of your program, and the answers to all questions discussed above. • Project demonstration.
Project Grading • Simulator: 80% • BRAIN98 programs: 10% • Write up: 10%
Exam Guide • The following sections will be on the exam: • Scheduling: Section 2.5 up to (but not including) Multiple Queues on page 144. • You should know this cold, including (but not restricted to) the various scheduling algorithms in slides (be able to, for example, calculate the average turnaround time for a given algorithm). Difference between batch and interactive scheduling, issues with both. • Memory Management: • Important note: There was significantly more material covered in class than is covered in the book. You need to know both- very well. • All sections except 4.1.3, 4.1.4, page replacement algorithm based on working set. 4.4.9, 4.5. 4.7.6, 4.8.2 to end of chapter. • In sections discussing page replacement algorithms, you are responsible only for those covered in class. But you need to know those. • Need to be able to use a page reference string and compute the number of page faults for a particular page replacement algorithm.
You need to completely understand how paging works. How virtual addresses are parsed and mapped to physical addresses. • Process page tables including their implementation and reasons for the various implementations. • Issues of page replacement. The page replacement algorithms discussed in class. Simulating LRU in software as was done in class. • Working set theory as discussed in class. • Thrashing, demand paging, pre-paging. • Skip working set implementation as discussed in the book and pay attention to issues discussed in class. • Understand implementation issues for a paging system. • Swapping systems. Fragmentation.
P0.2 P2.1 P1.0 P1.3 P4.7 P2.0 Physical Memory Page Table P0. Page Table P1.
Logical Memory P0.2 P2.1 P1.0 P1.3 P4.7 P2.0 0 1 2 3 Physical Memory Page Table P0. Page Table P1.
Logical Memory P0.2 P2.1 P1.0 P1.3 P4.7 P2.0 0 1 2 3 Physical Memory invalid invalid 0 invalid Page Table P0. Page Table P1.
Logical Memory P0.2 P2.1 P1.0 P1.3 P4.7 P2.0 0 1 2 3 Physical Memory invalid 2 invalid invalid 0 invalid invalid 3 Page Table P0. Page Table P1.
Assume a system with a 32-bit logical address space and 1K pages. • How many bits needed for offset?
Assume a system with a 32-bit logical address space and 1K pages. • How many bits needed for offset? 10
Assume a system with a 32-bit logical address space and 1K pages. • How many bits needed for offset? 10 • How many bits needed for pages? 22 • How many pages? 2^22.