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Calado Power ON/RESET Sequence. 5. 5V_AUX_S5 3D3V_AUX_S5. 5. AD+. DCBATOUT. DDR_VREF_S3_1. DDR_VREF_S3. 5V_S5. -5. -4. Adapter In. RT9026. TPS51125. PM_SLP_S4#. -6. VLDOIN/ VDDQSNS. S5. S3. -4. 4. 5. 3D3V_AUX_S5. 3D3V_AUX_S5. 5V_S5. 1D8V_S3. 1D05V_S0. 7. CPUCORE_ON.
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Calado Power ON/RESET Sequence 5 5V_AUX_S5 3D3V_AUX_S5 5 AD+ DCBATOUT DDR_VREF_S3_1 DDR_VREF_S3 5V_S5 -5 -4 Adapter In RT9026 TPS51125 PM_SLP_S4# -6 VLDOIN/ VDDQSNS S5 S3 -4 4 5 3D3V_AUX_S5 3D3V_AUX_S5 5V_S5 1D8V_S3 1D05V_S0 7 CPUCORE_ON 7 -1 TPS51124 CPUCORE_ON RSMRST#_KBC KBCENE3310 ECRST# PGOOD CPUCORE_ON PGOOD PM_PWRBTN# EN1 EN2 KBC_PWRBTN# 5V_S5 2 ISL6263A PM_SLP_S3# 7 PM_SLP_S4# 3D3V_S5 5V_S5 S5_ENABLE -2 1 3V/5V_EN 7 CPUCORE_ON 5 1D5V_S0 6 DCBATOUT PGOOD -3 3D3V_S5 3D3V_S0 TPS51125 PM_SLP_S3# 5V_S5 POK RT9018A EN1 EN2 5V_S0 1D8V_S3 5V_S5 6 3V/5V_EN -3 3V/5V_EN 3 4 PM_SLP_S4# PM_SLP_S3# 2 SLP_S3# RSMRST# SLP_S4# PWRBTN#_ICH REGISTER(BTCRL.SBR) PWRBTN# PCIRST# 0:RELEASE 1:RESET 13 ICH9-M KBC WPC8763L PLTRST# delay 1ms RTC_AUX_S5 LPC Debug BD RTCRST# PLT_RST1# VRMPWRGD RTC PWROK CPUPWRGD CK_PWRGD ODD 11 PWROK 1D05V_S0 5V_S0 3D3V_S5 H_PWRGD 10 LAN BCM5787M CLK_PWRGD RESET# EMC2102_PWROK PM_SLP_S3# W83L351 New Card NC7SZ08P5 EMC2102 4 240ms after Mini Card VCC_G792>4.38V VCC_CORE 13 12 7 8 VGATE_PWRGD VR_ON PGOOD GM965/GL960 CPUCORE_ON 9 RSTIN# ISL6266A CLK_EN# 11 PWROK H_CPURST# PWRGOOD H_CPURST# 14 CK_PWRGD/PD# Penryn CLK ICS9LPRS365 RESET#