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Buffered Routing Tree Construction Under Buffer Placement Blockage. Wei Chen & Massoud Pedram USC Premal Buch Magma Design Automation VLSID 2002. Outline. Motivation Preliminaries BRBP Algorithm Experiment Result Conclusion. Motivation (1/3).
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Buffered Routing Tree Construction Under Buffer Placement Blockage Wei Chen & Massoud Pedram USC Premal Buch Magma Design Automation VLSID 2002
Outline • Motivation • Preliminaries • BRBP Algorithm • Experiment Result • Conclusion
Motivation (1/3) • Buffering has been a common technique to improve circuit speed • No previous works construct buffered multi-pin routing tree with consideration to blockages
Motivation (3/3) • Proposed algorithm has three characteristics: • Buffer locations are not pre-determined • Multi-pin nets are easily handled • Use line-search algorithm instead of maze route
Preliminaries (1/3) • Problem definition: • Given placement blockages and locations of sources and sinks for all nets • To simultaneously build the net topology and insert sized buffer (inverter)
Preliminaries (2/3) • The delay model of buffer/inverter is a re-formulation of conventional RC model of CMOS gate delay[5] • The delay of a buffer: d = τ(p + gh) τ:scaling parameter p : parasitic delay of gate g : logical effort of the gate h : electrical effor(gain) Cl / Cin
Preliminaries (3/3) • Interconnect delay: Elmore delay model
BRBP Algorithm • BRBP algorithm flow • Hanan graph • Data structure and base solution • Solution propagation • Edge buffering • Pruning • Algorithm flow and time complexity
BRBP - Algorithm Flow Hanan graph Pop a solution & find its escape nodes Initialize base solutions For each escape node No Solution queue is empty? Expand solution to escape node Merge and prune Yes Implement best solution & map buffer/invters to real library New solution been dominated? Update timing Insert back to queue
BRBP - Data Structure • Each solution has five labels: • root : a pointer to the root of node tree formed by now • cap : capacitive load seen from root • req : required arrival time at root • reachable_set: a set of the nodes that are reachable from root • repeater : the type(buffer, inverter, null) and size inserted at root
BRBP-Base solution (2/2) • All base solutions are pushed into a priority queue priority_sols • Each time returns the solution with largestreq (less critical sinks or partial solutions)
BRBP-Solution Propagation (1/4) • Find escape nodes:
BRBP-Solution Propagation (4/4) • All of the new higher-level solutions are pushed back to priority_sols • After a popped-out solution expands to all its escape nodes, another solution is popped • Repeat the process until the priority_sols is empty or a solution reaches all the sinks
BRBP - Edge Buffering • If a edge between two roots are too long, we should also insert buffer/inverter on it • The maximum length that needs no buffer can be easily determined[10] • Generate new solutions at end of each segment
BRBP - Pruning (1/2) • Consider the set of solutions with the same root and driving the same sink set • For any two solutions u and v, if capu > capv and requ <= reqv, then u is dominated by v and will be dropped from priority_sols
BRBP - Pruning (2/2) • Pruning does not affect optimality • Pruning is performed in two cases: • When a solution merges with the other rooted at its escape node • Edge buffering
BRBP - Time complexity • If we have N‧M Hanan grids, at most K solutions are kept after each pruning, and n is the number of sinks: Worst-case space complexity:O(N‧M‧2n‧K) Time complexity:O(N2‧M2‧2(2n-m) ‧K2)
Conclusion • A dynamic-programming based algorithm is presented to perform buffered routing with placement blockages • Experiment result shows average improvement of 7.9% on longest delay and 2.3% on median port slack