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Micro Process Lecture Presentation Xiaozhan Jin Carbon NanoElectronics Lab

Micro Process Lecture Presentation Xiaozhan Jin Carbon NanoElectronics Lab MAY 19 2011 . Abstract—A fine-grained reconfigurable architecture based on double gate technology is proposed and analyzed. Each cell

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Micro Process Lecture Presentation Xiaozhan Jin Carbon NanoElectronics Lab

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  1. Micro Process Lecture Presentation Xiaozhan Jin Carbon NanoElectronics Lab MAY 19 2011 . Carbon NanoElectronics Lab.

  2. Abstract—A fine-grained reconfigurable architecture based on double gate technology is proposed and analyzed. Each cell in the array can act as logic or interconnect, or both, contrasting with current field-programmable gate array structures. Carbon nanoelectronics Lab.

  3. Contents: Ⅰ. INTRODUCTION Ⅱ. RECONFIGURABLE DG CELL Ⅲ. RECONFIGURABLE COMPUTING CIRCUITS Ⅳ. CONCLUSION Carbon nanoelectronics Lab.

  4. Ⅰ. INTRODUCTION • Reconfigurable architectures are good for power and performance efficiency. • As the scale of transistor shrinks many problem come out ,such as complex heterogeneous, alignment between process layers, and the poor performance in reduced gate length. These force designers to look toward others basis for reconfigurable architectures. • Wish-list----------------------Double-gate transistor

  5. Ⅱ. RECONFIGURABLE DG CELL A. DG Transistor Operation Fig. 1 shows the basic idea for a generic double-gate n-channel device simulated in Spice-3 using a fully depleted SOI model developed at the University of Florida Carbon nanoelectronics Lab.

  6. B. Silicide Source/Drain Devices • Quasi-Ballistic transport. • Significantly lower drive currents as the gate length shrink • Assumption: n-type transisters Carbon nanoelectronics Lab.

  7. C. Assembling the Array The objectivehere is to achieve a simple, regular organization that can then be configured using the control-gates of the complementary transistors. One possible layout for such an array is based on pairs of p and n-type transistors formed in undoped silicon by depositing (and annealing) materials such as erbium and platinum silicide in alternate rows (see Fig. 6).

  8. These complementary transistors have been organized into simple circuits exploiting this basic mechanism.

  9. Ⅲ. RECONFIGURABLE COMPUTING CIRCUITS&Ⅳ. CONCLUSION Will be continued………. Thanks for your attention

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