1 / 12

Theoretical Analysis of Low Phase Noise Design of CMOS VCO

Theoretical Analysis of Low Phase Noise Design of CMOS VCO.

shira
Download Presentation

Theoretical Analysis of Low Phase Noise Design of CMOS VCO

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Theoretical Analysis of Low Phase Noise Design of CMOS VCO Yao-Huang Kao; Meng-Ting Hsu; Microwave and Wireless Components Letters, IEEE [see also IEEE Microwave and Guided Wave Letters] Volume 15, Issue 1, Jan. 2005 Page(s):33 – 35 Digital Object Identifier 10.1109/LMWC.2004.840974(410) 15 級 別 : 碩 一 學 生 : 許 晉 榕

  2. Outline • Introduction • PHASE NOISE IN CROSS-COUPLED LC VCO • MEASUREMENT AND DISCUSSION • CONCLUSION

  3. Introduction • phase noise for integrated complementary metal oxide semiconductor (CMOS) voltage controlled oscillators (VCO) is an essential topic of research. • The feasible design procedure and structure to obtain the low phase noise is still in progress .

  4. PHASE NOISE IN CROSS-COUPLED LC VCO

  5. Varactor the PMOS is used because of the wide tuning capability and low phase noise. • But the quality factor of the tank is still limited mainly by the performance of the inductor

  6. Measured VCO transfer function

  7. A symmetric waveform is helpful to get the lower 1/f 3corner in phase noise.

  8. MEASUREMENT AND DISCUSSION (1) phase noise is demonstrated with 116 dBc/Hz at 600 kHz offset

  9. =(-116)+10log[(600 X 106 / 2]2 X22.626 =-172.91(dBc)

  10. COMPARISON WITH SOME REPORTED PAPERS BASING ON THE SAME STRUCTURE AND RELATED TECHNOLOGY

  11. CONCLUSION • From the procedure of optimization steps, the excess noise factor of the amplifier coming from the active device has been determined. The oscillator is implemented by the standard 0.35- m CMOS technology with phase noise 116 dBc/Hz at 600 kHz offset.

More Related