1 / 25

Design of RF CMOS Low Noise Amplifiers Using a Current Based MOSFET Model

Design of RF CMOS Low Noise Amplifiers Using a Current Based MOSFET Model. Virgínia Helena Varotto Baroncini Oscar da Costa Gouveia Filho. OUTLINE. Introduction MOSFET Model High-Frequency Noise Model LNA Analysis LNA Design Example Conclusion. Introduction.

jihan
Download Presentation

Design of RF CMOS Low Noise Amplifiers Using a Current Based MOSFET Model

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Design of RF CMOS Low Noise Amplifiers Using a Current Based MOSFET Model Virgínia Helena Varotto Baroncini Oscar da Costa Gouveia Filho

  2. OUTLINE • Introduction • MOSFET Model • High-Frequency Noise Model • LNA Analysis • LNA Design Example • Conclusion

  3. Introduction • Submicrometer CMOS technology allows the integration of RF circuits. • Low voltage and low power operation → moderate inversion • Model valid from weak to strong inversion

  4. D I(VG,VS) G I(VG,VD) B S MOSFET MODEL IF= forward current IR= reverse current

  5. where are the normalized currents Normalized currents and is the normalization current

  6. ir 103 strong 102 triode moderate reverse saturation ir > 100 if forward saturation if > 100 ir 100 weak 10-1 moderate strong weak 10-3 10-3 10-11 100 102 103 if Operation Regions of the MOS transistor

  7. Small signal parameters Transconductances Capacitances

  8. Rg D gmVgb G gmsVsb SvRg Cgb Sig Cgs Sid S S B B High- Frequency Noise Model

  9. 10-23 10-24 10-25 10-26 Sid (A2/Hz) 10-27 10-28 10-29 10-3 10-1 100 101 103 10-2 102 if Channel Thermal Noise

  10. Induced Gate Noise

  11. VDD Ld Vb M2 Vin M1 Lg LS LNA Analysis Cascode LNA with inductive source degeneration

  12. Lg Cgb Cgs gmbVsb Zin gmsVgs Z1 Ls Impedance Matching Z1 can be viewed as the parallel of a resistor R with the capacitance Cgs

  13. Simplified small signal model for the LNA matching is achieved simply by making the real part of Zin equal to the source resistance and its imaginary part equal to zero.

  14. Noise Figure Definition LNA small-signal model for noise calculations The noise figure can be expressed as a function of if

  15. Noise figure versus W/L for several inversion levels at 2.5 GHz

  16. LNA Design Example LNA Design Parameters

  17. if=35 Procedure 1. Choice of the inversion level

  18. 2. Ls for impedance matching

  19. 3. Transistor width for minimum noise figure Noise figure versus W/L for several inversion levels at 2.5 GHz

  20. 4. Lg to satisfy the resonance frequency 5. Ld to adjust the gain and the output resonance frequency

  21. RLd Ld Vout M1 RS CL M2 Lg Vin +Vbias Ls LNA Design Results VDD

  22. Simulation results Input impedance

  23. Noise Figure

  24. Conclusions • The main advantage of this methodology is that is valid in all regions of the operation of the MOS transistors; • It is possible to move the operation point of RF devices from strong inversion to moderate inversion taking advantage of higher gm/ID ratio, without degrading the noise figure;

More Related