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A flash-ADC for each strip with digital storage Replace electronics on Highest Rate Chambers

SLHC CSC Electronics Upgrade Spearheaded by OSU CMS Group. A flash-ADC for each strip with digital storage Replace electronics on Highest Rate Chambers Deadtimeless. ME1/1 Electronics Upgrade 504 DCFEBs OSU 72 DMBs NE,UCSB 72 TMB (d.c.) TAMU,UCLA

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A flash-ADC for each strip with digital storage Replace electronics on Highest Rate Chambers

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  1. SLHC CSC Electronics Upgrade Spearheaded by OSU CMS Group • A flash-ADC for each strip with digital storage • Replace electronics on Highest Rate Chambers • Deadtimeless ME1/1 Electronics Upgrade 504 DCFEBs OSU 72 DMBs NE,UCSB 72 TMB (d.c.) TAMU,UCLA 8 MPC Rice 72 LVDB (+more power) 72 LVMB 1008 Cables (default skewclear) 1st prototype Nov 2010 Analog-digital 18 layer board

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  3. SLHC Upgrade R&D Two Concerns about highest rate ME1/1 Chambers 1) CSC Trigger questionable for >2.1 - for rate split strips in half - for $$$ ganged strips 4 strip modulo 4 2) At SLHC Rates conservative estimate shows SCA overuse in ME1/1 at 10%! - neutron background not well known

  4. Digital CFEB – A Nice Idea for the SLHC • Replace Conventional ADC and SCA storage with Flash ADC and Digital Storage • New System Deadtimeless, Removes rate worries • Similar cost to old system • Fairly Radical Idea – Couldn’t build 8 Years Ago

  5. Overall Scope of Upgrade ME1/1 Electronics Upgrade 504 DCFEBs OSU 72 DMBs NE,UCSB 72 TMB (d.c.) TAMU,UCLA 8 MPC Rice 72 LVDB (+more power) 72 LVMB 1008 Cables (default skewclear) Left over boards ME4/2 upgrate

  6. Flash DCFEB R&D Board Status Replace ME1/1 board will be used for ME4/2 upgrade chambers A complex board (18 layers) Analog-Digital Ben Bysma (0.5 FTE) -Schematics complete end of August -Board Layout underway -Board Production October - Results Early November We intend to instrumented a chamber with new electronics during the 7TeV14TeV LHC shutdown

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