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KM3NeT Offshore Readout System On Chip

This paper discusses the development of the KM3NeT Offshore Readout System On Chip (RSOC), a highly integrated system using FPGA COTS technology for the KM3NeT underwater neutrino telescope. The RSOC aims to reduce power and space requirements, lower costs, and provide flexibility for different detector configurations. The paper also presents the upgrade of the ANTARES Offshore DAQ hardware-firmware-software and the performance evaluation of the network throughput. The RSOC design and test setup, as well as future developments, are also discussed.

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KM3NeT Offshore Readout System On Chip

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  1. KM3NeT Offshore Readout System On Chip A highly integrated system using FPGA COTS S. Anvar, H. Le Provost, F. Louis, B.Vallage – CEA Saclay IRFU – Amsterdam/NIKHEF, 2008 September 9

  2. KM3Net “Readout System On Chip” (RSOC) • Assumptions • Off-Shore Ethernet network topology • An Ethernet node is located near a set of Optical Modules • Principles • ANTARES-like design with much higher level of integration • Reduce power & space requirement • Reduce cost • Flexible • Can be tuned to a specific detector configuration (number of OMs per node, data rates…)

  3. The ANTARES Off-Shore Processor Board Readout System On Chip : One Component Data from storey(ASIC to digitalise) Programmable Logic FPGA (1000k gates) Processor (Motorola MPC860P@80MHz) Data Data Task Processor boot RTOS Slow Control Task Slow Control Memory Flash (4 MB) Memory SDRAM (64 MB) Slow-Control for the Storey 100Mb/s Ethernet Link To shore station

  4. The KM3Net Off-Shore Processor Board ST : Slow control Transceiver LCM Slow Control Bus OM : Optical Module LCM : Local Control Module XILINX VIRTEX4-FX OM 0 LVDSLinks Front End ASICS OM 1 LVDSLinks Processor IBM PPC405 @450 MHz Custom Logic OM 2 LVDSLinks DDR Memory Serial ST CPU Bus Arbiter Ethernet Flash Memory Configuration Port Small Logic To Shore Station

  5. A KM3Net RSOC demonstrator • Upgrade of the ANTARES Offshore DAQ Hardware-Firmware-Software • Demonstrates the performances in realistic conditions on a ANTARES LCM test bench • Evaluate the network throughput versus operating frequency • Evaluate the power

  6. Upgrade of the ANTARES Offshore DAQ • Software • VxWorks 6.3 Board Support Package for the Xilinx ML405 board available. Bootrom and vxWorks image are running. • The Offshore “foooDaq” software have been fully modified and recompiled for the PPC405 processor • Firmware • The master/slave interfaces have been modified to support the PPC405 instead of the MPC860 processor. • The LVDS drivers are mapped in the Xilinx device. • The whole design (6 ASICS links) “Readout SOC” have been synthesised/placed/routed -> XC4VFX40-10 • 80% area occupancy • PPC405@300MHz, Processor Bus@100MHz • VHDL code Fully simulated

  7. RSOC Design Test Setup (1) ANTARES Run Control ANTARES LCM Crate XILINX ML405 Board Pseudo-Clock Board • XC4FX20 device • (PPC405@300MHz, • 1 Gb/s Ethernet link) • 128 MB DDR SDRAM • 8 MB Flash Adaptation Board CPU Slot OM 2 OM 1 3 ARS Boards OM 0 Will be upgraded with a ML507/XC5FX70 (board fully compatible) + experiment clock integration (virtex5 feature)

  8. RSOC Design Test Setup (2) LCM crate ARS board Adaptation boards ML405 Kit

  9. RSOC test status - What is running (fully tested) • The slave interface (PPC405->custom logic) • Run Control/DAQ Harness • Framing/interrupts • ARS slow control • To debug for a fully RSOC • ARS data path (firmware) • Some random crash@start (software)

  10. Readout System On Chip / Phase 2 • Developments are based on PRISM component • Virtex 4FX60 • 256 MB DDR2 SDRAM • 128 MB Flash • 10/100/100 Base T Ethernet • 160 GPIOs

  11. KOALA Board (KM3Net Optical module Acquisition board for LocAl Processing)prototype board OM 0 Base power supply Scott OM 0 OM 1 Base power supply OM 2 Base power supply Scott PRISM VIRTEX4-FX Processor module OM 1 Instrumentation Compass Tiltmeter Humidity Etc… Serial Scott OM 2 Power supply Dc/Dc 400V Ethernet gigabit link

  12. KOALA located in an OM PMT base KOALA board

  13. Scott test bench • Scott test bench • Virtex 4FX60 development board with vxWorks • Daughter board with Scott and associated circuits • Possibility to read PMT analog signal • Make use of KM3Net software study (S.Anvar, F.Chateau)

  14. Development plan 2008 2009 September November February June Ready for use Evolution/Prism & Scott RSOC Development Submission ASIC Scott Operational Manufacturing Development Scott Test bench Manufacturing Operational Development KOALA

  15. Conclusion • RSOC upgrade of the ANTARES offshore DAQ in the debugging phase. • SCOTT test bench based on RSOC Hardware and Software • KOALA board development for a common SCOTT/RSOC demonstrator • Pre-study foreseen for the Integration of the clock distribution to the RSOC.

  16. Virtex-4 FX Network Throughput • Maximum achievable TCP sending throughput PPC405@300MHz, Processor Bus@100MHz, on chip Gigabit Ethernet MAC (TEMAC) • MontaVista Linux : 520 Mb/s, Application Note Xilinx xapp1023. • WindRiver vxWorks : 590 Mb/s, Application Note Xilinx xapp941.

  17. Conclusion • RSOC upgrade of the ANTARES offshore DAQ on its way. No blocking point. ~3 Months to finalize it and give relevant inputs for the Technical Design Report. • Digital solutions, hardware and software, off-the-shelf • Integration of the clock distribution to the RSOC under study.

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