Instruction Storage and Usage

1. Instruction Storage and Usage • Instructions are stored in a memory called instruction memory • To execute each instruction, we get the instruction out of memory, store in a register called instruction register (may be more than one single register of n-bits depending on the number of words in an instruction), and carry out operations on data path to achieve the desired result • It may take more than one cycle to execute an instruction • Each cycle is called phase (or state) in instruction execution • Actions in one cycle is stored in one nano-instruction • For each instruction (micro-instruction per book), multiple nano instructions, one for each phase, are stored in nano_inst_mem • Instructions are fetched one at a time pointed by a counter, called program counter • For each instruction, nano instructions are fetched from nano memory, using a counter called nano-program counter

2. Inst Mem WIAD Nano Inst Mem INAD PC IAddr Control NPC INST NAddr IIAD WNAD Input Output RA1 RA2 M- Reg WOUT Reg File OpCode EMR EALU EI S H I F T A L U WM Mem Unit Cond Code RM WR Data Addr SC WA EM WDAD Adding Program Memory • Program memory has • A PC • Memory • Mechanism to change PC

3. Inst Mem Nano Inst Mem IIAD INAD PC INST Control NPC IAddr NAddr WIAD WNAD Input Output RA1 RA2 M- Reg WOUT Reg File OpCode EMR EALU EI S H I F T A L U WM Mem Unit Cond Code RM WR Data Addr SC WA EM WDAD Adding Conditional Branches • ALU generate status bits like • carry, overflow, sign, and zero • zero=1 means result from ALU is zero • These bits can be used to change flow of program • A new address is generated using CCs

4. Inst Mem Nano Inst Mem IIAD INAD PC INST Control NPC IAddr NAddr WIAD WNAD Input Output RA1 RA2 M- Reg WOUT Reg File OpCode EMR EALU EI S H I F T A L U WM Mem Unit Cond Code RM WR Data Addr SC WA EM WDAD Conditional Branch Instruction • Program change flow • For example • If.. Then… Else • Condition codes determine flow • PC is changed