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LAr sLHC Electronics Meeting ________ LoI Status

This document provides an update on the status of the Electronics chapter 4.3 of the LAr Calorimeter Upgrades for the ATLAS sLHC project. It includes information on the structure, readout system, front-end and back-end electronics, interface to the level-1 trigger system, power supply system, services and auxiliary electronics, cost, and responsibilities. It also highlights the timeline for the completion of the LoI.

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LAr sLHC Electronics Meeting ________ LoI Status

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  1. LAr sLHC Electronics Meeting________LoI Status Mauro Citterio INFN Milano Tuesday,September, 22, 2009

  2. Structure of the Electronics chapter 4.3 LAr Calorimeter Upgrades F.Lanni / A.Straessner 4.3.1 LAr detectors H.Oberlack 4.3.2 LAr readout electronics M.Citterio (10 pp.) .1 Introduction M. Citterio (1 pp.) .2 Readout system description A. Straessner, M. Citterio (2.5 pp.) .3 Front-End electronics G. Brooijmans, J. Ye (2 pp.) .4 Back-End electronics: digital signal processing H. Chen, G. Perrot (2 pp.) .5 Interface to the level-1 trigger system (1 pp.) .6 Power supply system J. Kierstead (1 pp.) .7 Services and auxiliary electronics M. Citterio (0.5 pp.) 4.3.3 Cost and responsibilities F.Lanni / A.Straessner Tuesday,September, 22, 2009

  3. ATLAS sLHC LoI Timeline • May-09 LAr week • Agreed on a general outline of the calorimeter part of LoI • Detailed outline of the Electronics session finalized into 7 paragraphs • Sep-09 • Paragraphs assigned to authors • No. Pages: fixed • Figs and tables: to be carefully selected due to the limited number of pages. Use of references is suggested • Drafts partially written, comments are circulating between authors • Oct-09 (week 41) • Finalize draft 0 of the electronics chapter of LAr LoI • Discussion/reviews carried on during phone meetings • Dec-09 LAr week • Final draft of overall LAr LoI • LoI given to LAr collaboration for comments • End of Feb-10 • Finalize LAr LoI • LAr LoI given to ATLAS Tuesday,September, 22, 2009

  4. Few comments ..... (1 of 2) • Motivation for a new electronics • Aging/obsolescence of components • Degradation/malfunction due to radiation • All data-out architecture is the preferable option (BASELINE?) but “selected by trigger data-out” architecture still considered! • A strategy will be required to decide between options • We need to define some criteria and action to be taken to reach the decision point • General system description • Mimic existing system • What type of boards are into a crate must agree with the data flow accepted as baseline • Calibration precision  what are the new specifications ? • Interface to Level 1 trigger • Maybe this entry should be removed and this topic described in the electronics architecture Tuesday,September, 22, 2009

  5. Few Comments …. (2 of 2) • Front-end • We should address some question about technology and specification • Ex. SiGe preamps are the only choice? • Ex. 12, 14 or 16 Bits ADC what is really necessary? • ROD and back-end • Leave space to “technology evolution” • Max data throughput: estimate necessary • Ancillary components • Description limited to their functions/utility • Power supply system • Critical issues should be addressed (reduction in supply voltages, increase in current, noise) • Only the general specifications must be described • Power distribution BUS: what are the option? • POL is the only solution? Mounted directly on the board? Tuesday,September, 22, 2009

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