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Implementation of Variable-Block-Size Motion Estimation Algorithm Using Systolic Array Architecture

Implementation of Variable-Block-Size Motion Estimation Algorithm Using Systolic Array Architecture . Yen-Ting Lin Wei-Jen Chen. Outline. Motion estimation algorithms( Full Search Block Matching Algorithm) Systolic array architecture for motion estimation algorithms Implementations.

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Implementation of Variable-Block-Size Motion Estimation Algorithm Using Systolic Array Architecture

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  1. Implementation of Variable-Block-Size Motion Estimation Algorithm Using Systolic Array Architecture Yen-Ting Lin Wei-Jen Chen

  2. Outline • Motion estimation algorithms( Full Search Block Matching Algorithm) • Systolic array architecture for motion estimation algorithms • Implementations

  3. Fix-sized Full-Search BMA • Equation: • Disadvantage: Redundancy VS Accuracy • - Use small block size: • some blocks will have • identical MV, thus reduce • the efficiency of compression • Use large block size: • may mispredict the movement • of some small objects Reference frame (y) Current frame (x)

  4. Variable block size BMA • Split approach, usually in a quad-tree manner • The motion vector for the previous page can be represented as:

  5. Systolic array mapping for 4x4 full-search BMA [Yeo and Hu] • Write down the 6 level do loop algorithm • Reformatted into a three level nested do loops • Localize the indexes of the inner loop indexes • Project the 3-dim array two times into 1-dim systolic array

  6. Systolic array for variable block size ME (4x4 & 8x8) • Easy to implement • Short clock period • Large number of input pins Block of current frame 4 8 Block of reference frame

  7. Systolic array for variable block size ME (4x4, 8x8 &16x16)

  8. Implementation PE Data Flow System Schematic Diagram

  9. Implementation (cont’d) Implemented by Verilog; Verified by C/Matlab Waveform of 4x4 fixed size Waveform of 4x4 & 8x8 variable size

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