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RISC ARCHITECTURE

RISC ARCHITECTURE. By Guan Hang Su. Over View. -> RISC design philosophy -> Features of RISC -> Case Study -> The Success of RISC processors -> CRISC. What is RISC ?. RISC = Ridiculously Simple Computer Or RISC = Reduced Instruction Set Computers.

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RISC ARCHITECTURE

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  1. RISC ARCHITECTURE By Guan Hang Su

  2. Over View -> RISC design philosophy -> Features of RISC -> Case Study -> The Success of RISC processors -> CRISC

  3. What is RISC ? RISC = Ridiculously Simple Computer Or RISC = Reduced Instruction Set Computers

  4. RISC design philosophy • RISC is a design Philosophy where you reduce the COMPLEXITY of the instruction set, which will reduce the amount of space, time, cost, power, heat and other things it takes to implement the instruction set part of a processor.

  5. Features of RISC • 1) small instruction set • 2) load/store architecture • 3) fixed length coding and hardware decoding • 4) large register set

  6. (continue) • 5) delayed branching • 6) processor throughput of one instruction per cycle in average

  7. Benefits of RISC • RISC processor will cost less to design -- since a significant cost of the chip can be the actual R&D costs to create it, this can be substantial on its own • easier to design (and fewer bugs) means that the processor will have a faster time to market • faster time to market means the processor can use newer processes

  8. (continue) • newer manufacturing processes mean smaller transistors -- smaller transistors means more space on chip, less cost to manufacture, lower power (which creates less heat) and it means more MHz -- or some balance of all of those rewards • simpler to design means that they have more time for adding other things (things that can make the processor do more in each cycle) • more design time also means that you can tune the processor more to get more MHz (more cycles) and many other effects

  9. Case Study • Intel i386 for the most part processed only one instruction at a time and took, on the average, five to ten clock cycles to execute each one. The first RISC processors were fully pipelined, typically with five stages, and averaged between 1.3 and 2.0 clock cycles to execute an instruction.

  10. Case Study (x86 and RISC processor of the early RISC era in 1987).

  11. (continue) • The MIPS R2000 processor is a smaller device built in an older semiconductor process with less than half the number of transistors as the Intel i386DX, yet it blows its CISC counterpart right out of the water in performance: more than twice the Dhrystone MIPS rating and more than four times the SPECmark89 performance (even with a smaller external cache).

  12. (continue) • In this case study, RISC processor shows huge advantage of the design concept for the upcoming era of VLSI-based microprocessors is clear. * VLSI (Very-large-scale integration)

  13. The success of RISC • The first system that would today be known as RISC but wasn’t at that time, it was the CDC 6600supercomputer, designed in 1964 by Seymour Cray. • 1925-1996

  14. Cray-1 memory board • It requires its own electrical sub-station to provide with power. The unit electrical bill was $30,000-$35,000 per month. $20,000 for the air-condition room and about $10,000-$15,000 for the machine. Cost per board was about $50,000 to replace with the $1,000,000 per year maintenance contract. • (Are the quotes were from the paper's in San Francisco Examiner

  15. The Success of RISC • There are a number of factors which have transformed RISC technology into a success in the marketplace • First factor simplicity of design (most important). *Original RISC processors contained less than 300,000 logic gates and even today. RISC processors are typically much more compact and leaner than CISC processors.

  16. 2) The second factor which has made possible the performance gains associated with RISC processors is better compilers. • Compiler technology has changed in the last few years and many techniques which just yesterday were considered very sophisticated are now fairly common. Optimizing compilers have driven assembly language programmers to extinction.

  17. (continue) • There are four major players in RISC market: SUN, Hewlett-Packard, IBM and MIPS. • These four companies account for most of the RISC chips sold for Workstations. The four are mutually incompatible.

  18. Apple iMAC: Using a RISC Processor

  19. What is CRISC?

  20. CRISC = CISC + RISC (Complex/Reduced Instruction Set Computing)

  21. CRISC is a 32-bit single-chip VLSI processor architecture that achieves high performance by means of RISC and multiple functional unit approaches

  22. One computer that exhibits features of both CISC and RISC is the Cyrix M1. • It has 32 general-purpose registers as a typical reduced instruction set computers, but by using a technique called dynamic register naming, only 8 registers are visible at a time.

  23. The Pentium is another CISC/RISC hybrid. It uses variable-length instructions and few general-purpose registers as a complex instruction set computer would, but it adopts RISC-like features, pipelining and a floating-point unit.

  24. References • http://granite.sru.edu/~dawna/paper.html • http://en.wikipedia.org/wiki/RISC • http://www.mackido.com/Hardware/x86RISC.html • http://www.osdata.com/system/physical/processors.htm

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