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Goal: Build an ALU

Goal: Build an ALU. The Arithmetic Logic Unit or ALU is the device that performs arithmetic and logical operations in the computer. We will build it out of 4 basic building blocks. AND gate: performs the AND operation on 2 signals. OR gate: performs the OR operation on 2 signals.

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Goal: Build an ALU

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  1. Goal: Build an ALU • The Arithmetic Logic Unit or ALU is the device that performs arithmetic and logical operations in the computer. • We will build it out of 4 basic building blocks. • AND gate: performs the AND operation on 2 signals. • OR gate: performs the OR operation on 2 signals. • Inverter: inverts the incoming signal (o to 1, 1 to 0). • Multiplexor: chooses between one out of several incoming signals. Computer Structure- The ALU 1/13

  2. The Basic Building Blocks 2/13

  3. 1-bit Full Adder • 1-bit addition has 3 inputs (a, b, CarryIn) and 2 outputs (Sum, CarryOut). • The CarryOut is set if at least 2 out of a, b, and CarryIn are 1. • The Sum is set when exactly one input is 1 or all three are 1. 3/13

  4. 1-bit ALU • We now have a 1-bit ALU that can perform AND, OR and addition. • All 3 operations are performedin parallel. • The MUX (Multiplexor),dependent on theoperation,chooses the result. Computer Structure- The ALU 4/13

  5. Subtraction • Subtraction is performed by adding the negative value. • Thus we have to add an inverter. • A MUX has to be added to choose between addition and subtraction. Computer Structure- The ALU 5/13

  6. 32-bit ALU • With 32 of these 1-bit ALUs we can build a 32-bit ALU. • The CarryOut of the Nth 1-bit ALU is connected to the CarryIn of the N+11-bit ALU. • This adder is called a ripple carry or ripple adder. • A single carry out in the least significant bit(LSB) can cause a carry out of the MSB. Computer Structure- The ALU 6/13

  7. Adding the slt instruction • slt produces 1 if rs < rt, 0 if rs >= rt. • Thus slt will set all but the LSB to 0 with the LSB being dependent on the result. • We add a new input to the multiplexor called Less, this will be the output of slt. • To set the LSB we perform rs - rt. • If the result is negative we must set the output. Thus the sign bit is the correct output. • But it isn't the output of slt (Less is) so a new output is added to the 1-bit ALU of the MSB,Set. • The input of the last 31 Less lines is 0, the input of the 1st Less line is Set of the 32nd ALU. Computer Structure- The ALU 7/13

  8. ALU with slt • The Less line is added to all ALUs. • The 32nd ALU has a Set line. • The 32nd ALU also has overflow detection circuitry. 8/13

  9. The New ALU • All the Less inputs are hardwired to zero. • Except the LSB Less input which is wired to the Set output of the MSB 1-bit ALU. Computer Structure- The ALU 9/13

  10. Comparison in the ALU • bne and beq compare 2 numbers. • a is equal to b if a - b=0. • The output line Zero is set to 1 if all the Result lines are 0. • This happens if a == b. Computer Structure- The ALU 10/13

  11. ALU Summary • Our ALU can perform AND, OR, Addition, Subtraction, Set on less then (slt), and Equality tests. The universal symbol of the ALU is shown here: Computer Structure- The ALU 11/13

  12. Fast Addition • The addition we have just described is to slow. We have to wait until carry values ripple through the ALU. • Do we have to wait?c1 = (b0*c0)+(a0*c0)+(a0*b0)c2 = (b1*c1)+(a1*c1)+(a1*b1) • Thus we can compute c2 without waiting for the carry c1:c2=(a1*a0*b0)+(a1*a0*c0)+(a1*b0*c0)+(b1*a0*b0)+(b1*a0*c0)+(b1*b0*c0)+(a1*b1) • We can in fact compute c32 with only a,b and c0. However the size of the adder will be very large. This is called a Fast-Adder. Computer Structure- The ALU 12/13

  13. Carry Lookahead Addition • Each 4 bit Fast-Adder outputs a Propagate (תעביר) and Generate (תייצר) bit. • Generate means there is a CarryOut, independent of the CarryIn.. • Propagate means the CarryOut is dependent on the CarryIn. • This is called Carry Lookahead Addition. Computer Structure- The ALU 13/13

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