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Christian Plessl 1 Rolf Enzler 2 Herbert Walder 1 Jan Beutel 1 Marco Platzner 1 Lothar Thiele 1 1 Computer Engineering Lab 2 Electronics Lab ETH Zurich, Switzerland. Reconfigurable Hardware in Wearable Computing Nodes. Outline. Characteristics of Wearable Computers
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Christian Plessl1 Rolf Enzler2 Herbert Walder1 Jan Beutel1 Marco Platzner1 Lothar Thiele1 1Computer Engineering Lab 2Electronics Lab ETH Zurich, Switzerland Reconfigurable Hardware in Wearable Computing Nodes
Outline • Characteristics of Wearable Computers • Hardware architectures • Reconfigurable Devices • Use of Reconfigurable HW in Wearable Computing • Wearable Unit with Reconfigurable Modules (WURM) • Case studies, Prototypes • Conclusions
Wearable Computing Systems…… as we see it • Distinctive Features: • embedded • distributed • heterogeneous • connected via body area network • Design characteristics: • multi-mode performance • energy awareness • high flexibility / adaptability
The Quest for an Optimal Architecture for Wearable Computers • Conflicting goals: • high-performance • low-power • flexibility Flexibility CPU DSP RC ASIC Performance1/Power consumption
Reconfigurable (RC) Devices - Hardware • Predominant device: FPGA • CLBs(Configurable Logic Blocks) • Routing Ressources • IOBs (Input / Output Blocks)
RC Devices – Application Domains • RC most efficient for: • regular and parallelizable operations • bit-level operations • custom bitwidths • Examples: • Mencer et al [ICASSP’98]: IDEA encryption: • Stitt et al [FCCM’02]: Energy savings of 71% on a set of embedded benchmarks (measured on Triscend E5) • Mobile multimedia (IMEC Gecko plattform) DSPCryptoCommunication
Use for RC in Wearable Computers • ASIC on demand • application specific coprocessors • available locally, or sent via wireless network • new circuits provided when new applications arise • Adaptive interfaces • device provides generic I/O pins and transceivers • protocol for communication is not fixed, but software defined in FPGA • Interface might be simple or complex • SPI, I2C, Ethernet, RS232 (simple) • IP, UDP, TCP (complex) • Offload Parts of communication protocol handling
Use for RC in Wearable Computers (2) Gyro sensors 706 kbit/s I2C ADPCMCompression Feature Extract-tion & Analysis Arm motionsensing 170 kbit/s 3 bit/s 120 bit/s Main Module Main Module Main Module Context Engine Context Engine Harddisk
Research Issues – What’s needed • HW Plattforms: • RC partially reconfigurable • RC fast reconfigurable • CPU – RC interface fast and versatile • SW Tools: • Synthesis / compilation • abstraction for hw tasks • creation of partially reconfigurable tasks • RC Operating System • multitasking of RC • interfaces hw/sw
WURM - Wearable Unit with RC Modules • WURM Hardware Architecture • CPU for: • legacy C-code, binary only code • low-intensity, background tasks • RC unit for: • high-performance tasks • low-power tasks
WURM - Hardware Prototype • XESS board, multitude of I/O interfaces • Soft CPU (LEON, 32bit SPARC) • BTnode (custom Bluetooth Module)
WURM - SW Architecture • WURM OS layer: • loading, placing and scheduling of hw/sw tasks • inter-task communication, task I/O • sw tasks handled by realtime os WURM-OS CPU RC
Audio stream player Complete WURM on FPGA LEON 32bit SPARC soft-CPU core RTEMS (real-time OS) ADPCM decoder (Intel DVI compliant) dynamic reconfiguration FPGA PCM / ADPCMaudio data CPU (LEON core, RTEMS) PCM/ ADPCM Player Ethernet Case Study 1: ASIC on Demand
Case Study 2: Adaptive Interface • Bluetooth/Ethernet-Bridge • IP access point for WURM modules via Bluetooth • Minimal TCP/IP stack • Ethernet MAC ((( ))) Hard-ware IP stack IP Network BTnodeBluetoothmodule RS232 Ethernet
Conclusions & Next Steps • Concept for reconfigurable hardware in wearable computing • Experimental status: • first implementation of partially reconfigurable WURM prototype including BTnode • tool for creation of partially reconfigurable tasks • multi-tasking on RC demonstrated • Next Steps: • autonomous reconfiguration, receive tasks over network • task and resource management in WURM OS