On Reconfigurable Single-Electron Transistor Arrays Synthesis Using Reordering Techniques

1. On Reconfigurable Single-Electron Transistor Arrays SynthesisUsing Reordering Techniques Speaker: Ching-Yi Huang Authors: Chang-En Chiang, Li-Fu Tang, Chun-Yao Wang, Ching-Yi Huang Yung-Chih Chen§, SumanDatta†, Vijaykrishnan Narayanan‡ Dept. of Computer Science, National TsingHua University, Taiwan §Dept. of Computer Science and Engineering, Yuan Ze University, Taiwan †Dept. of Electrical Engineering, The Pennsylvania State University, PA, U.S. ‡Dept. of Computer Science and Engineering, The Pennsylvania State University, PA, U.S.

2. Outline • Introduction • Area optimization approach • Variable reordering (Column reordering ) • Product term reordering (Row reordering) • Experimental results • Conclusion Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

3. Introduction • SET: Single-Electron Transistor • Low power device • An SET array can be presented as a graph composed of hexagons. • All sloping edges areconfigurable • short, open, active (high or low) • Active edges at the same row are controlled by a single variable Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

4. Example • An example of a EXOR b: active high a a active low short open b b a a b b Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

5. Mapping constraint • Fabric constraint • (high, low) and (low, high) cannot simultaneously appear in a row • For simplification, we allow only one of (high, low) and (low, high) to appear in an SET array 010- 0110 101- 11-- (high, low) Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

6. SET array • Due to the low-driving strength of SET device, only one path can be conducted in an SET array at a time 010- • 0--0 0 1 0 0 010- • 0110 • 00-0 Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

7. Problem formulation • Given: A Boolean function • Objective: Mapping the product terms into an SET array with optimized area considering the fabric constraint Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

8. Previous mapping approach • BDD -> Product term -> SET array current detector 0010 01-0 100- 11-- 0 1 1 Configure a path in an SET for each product term while avoid producing invalid paths Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

9. Features • Variable reordering • Product term mapping ordering considering fabric constraint Previous work Ours Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

10. Outline • Introduction • Area optimization approach • Variable reordering • Product term reordering • Experimental results • Conclusion Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

11. Area optimization approach Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

12. Front-end variable determination • Move the variables with the same bit value among all product terms to the front-end • Move the all-shared valuables having the bit value - to the back-end of other all-shared variables because bit value - has more flexibility P1 1－10－11－11－－111 P2 1－10－11－11－－110 P3 1－10111－10－－111 P4 1－10－01－10－－110 P5 1－10001－10－－111 P6 1－01001－10－－111 P7 0－－－001－10－－110 P1 1111－－－－110－111 P2 1111－－－－110－110 P3 1111－－－－1101101 P4 1111－－－－110－000 P5 1111－－－－1100001 P6 1111－－－－1010001 P7 1111－－－－00－0000 Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

13. Remaining variable reordering • Branch-then-Share • After the merging point, all the variables should be the same value • Case: (01,10), (1-,01), (0-,10) • Case: (0011,1100) ,(00-1,11-0) , (00--,11-0) ,… Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

14. Remaining variable reordering • We separate these product terms into scopes according to the quantity and the distribution of different bit values • There are many product terms • Separate these product terms • into two scopes Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

15. Example P1 P2 P3 P4 P5 P6 P7 110-111 110-101 1101110 010-100 0100110 0010110 0-00000 1110-11 1110-01 1110110 1010-00 1010010 1001010 00-0000 1101-11 1101-01 1101110 1100-00 1100010 1010010 0-00000 11011-1 11011-0 1101011 11000-0 1100001 1010001 0-00000 1101-11 1101-01 1101110 1100-00 1100010 1010010 0-00000 MAX 4553645 355344 3333 222 21 (a) (b) (c) (d) (e) Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

16. Area optimization approach Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

17. Ladder shape • We use a heuristic method to make the shape of mapping result like a ladder Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

18. Grouping • The grouping is a step that explores the share relationship among all product terms by building a grouping tree • The product terms would be divided into several groups • Build a grouping tree • Until each group only has one or two product terms Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

19. Example P1~P8 P1:1－11011－1 P2:1－11011－0 P3:1－1101011 P4:1－11000－0 P5:1－1100001 P6:1－1010001 P7:1－01－0000 P8:1－－1－1111 1－1 1－ － 1－0 1－10 1－ 11 P1~P6 P7 P8 1－ 1100 1－ 1101 1－ 11010 1－ 11011 P3 P4,P5 P1,P2 P1~P5 label leaf group P6 P1~P3 Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

20. Expansion and branch level predictions • Predict the expansion and branch level (EBL) of each product term before mapping. • The consecutive mapping of different bits creates the pitfall of invalid path creation during expansion. Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

21. Example P1~P8 P1:1－11011－1 P2:1－11011－0 P3:1－1101011 P4:1－11000－0 P5:1－1100001 P6:1－1010001 P7:1－01－0000 P8:1－－1－1111 1－1 1－ － 1－0 1－10 1－ 11 P1~P6 P7 P8 1－ 1100 1－ 1101 Expansion & branch level prediction P1:9 P2:8 P3:6 P4:9 P5:8 P6:3 P7:3 P8:9 1－ 11010 1－ 11011 P3 P4,P5 P1,P2 P1~P5 label leaf group P6 P1~P3 Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

22. Product term order determination • Determine the product term order by estimated EBL, Branch-then-Share and group relations in the grouping tree • Select the product term with the smallest estimated EBL first • If there are more than one product terms with the same estimated EBL • Find the first branch point and calculate the number of product terms P1~P20 P16~P20 P1~P15 Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

23. Mapping priority • Choose the next product term to map based on the Branch-then-Share • Since Branch-then-Share represents a good share relationship between two product terms, we sequentially map them • When finish mapping the current group, trace the upper level group first • With higher relation, and more possibility to share • Priority: Branch-then-Share > group relations > estimated EBL P1~P8 P1:1－11011－1 P2:1－11011－0 P3:1－1101011 P4:1－11000－0 P5:1－1100001 P6:1－1010001 P7:1－01－0000 P8:1－－1－1111 P1~P6 P7 P8 1－1 1－ － 1－0 1－10 1－ 11 P3 P4,P5 P1,P2 P1~P5 1－ 1100 1－ 1101 P6 Expansion & branch level prediction P1:9 P2:8 P3:6 P4:9 P5:8 P6:3 P7:3 P8:9 1－ 11010 1－ 11011 label Tentative product term mapping order P7 → P6→ P5→ P4→ P3→ P1→ P2 → P8 P1~P3 leaf group Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

24. Overall mapping flow Input: a set of product terms. Variable reordering Move the all-shared variables among all product terms to the front. Collect the pairs of product terms which are the Branch-then-Share. Useremaining column reordering to make branch and expansion appear at the lower level on the premise of avoiding destroying share relationship. Product term reordering Find the share relationship among all product terms by grouping. Predict the EBL for each product term. Determine the product term mapping order by considering EBL, Branch-then-Share, and group relationship. Map product terms into an SET array with mapping constraint relaxation. Output: an SET array. Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

25. Outline • Introduction • Area optimization approach • Variable reordering • Product term reordering • Experimental results • Conclusion Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

26. Experimental results • Experiment • Set the fabric constraint (high, low) for every row of the SET array • Compare the previous work with our variable and product term reordering approach • 31 circuits from MCNC and IWLS 2005 benchmark Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

27. Experimental results Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

28. Outline • Introduction • Area optimization approach • Variable reordering • Product term reordering • Experimental results • Conclusion Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

29. Conclusion • We propose an approach consisting of variablereordering, product term reordering, and mapping constraint relaxationtechniques to efficiently mapping reconfigurable SET arrays • Our future work is to focus on the width minimization in our algorithm Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan

30. Thank you !!! • Thanks for you attention  Ching-Yi Huang/ Dept. Of Computer Science, National Tsing Hua University, Taiwan