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New xTCA Developments at SLAC

New xTCA Developments at SLAC. CERN xTCA for Physics Interest Group Sept 26, 2011 Ray Larsen SLAC National Accelerator Laboratory. Lexicon. xTCA – Includes large board ATCA system favored by Telecom and small board AMC MicroTCA shelf with extensions for Physics

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New xTCA Developments at SLAC

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  1. New xTCA Developments at SLAC CERN xTCA for Physics Interest Group Sept 26, 2011 Ray Larsen SLAC National Accelerator Laboratory New xTCA Developments at SLAC - R. Larsen

  2. Lexicon xTCA – Includes large board ATCA system favored by Telecom and small board AMC MicroTCA shelf with extensions for Physics AMC – Advanced Mezzanine Card in MicroTCA or ATCA Carrier Board RTM, μRTM – Rear Transition Module for ATCA or MicroTCA IPMI – Intelligent Platform Management Interface, core feature of xTCA managed systems SM – Shelf Manager card, 2 used in redundant shelf, non-payload slot LCLS – Linac Coherent Light Source newest generation light sources at SLAC, LCLSI operating, LCLSII approved for construction start 2013 BPM – Accelerator Strip-line or Cavity Beam Position Monitor, typically 4 channels with online calibration between beam pulses PICMG3.8 – New Physics standard for interface from ATCA to RTM MTCA.4 – Complete new 2-wide AMC standard with RTM for MicroTCA AIP – Accelerator Improvement Program New xTCA Developments at SLAC - R. Larsen

  3. I. Standards Progress • Hardware, Software Technical Committees formed under PICMG • 2 new HW standards approved • ATCA • PICMG3.8 Standard IO interface to Rear Transition Module (RTM), IPMI extension & power connector • MTCA • MTCA.4 Crate, 2-wide AMC & RTM, IO interface, IPMI extension and power pins designated New xTCA Developments at SLAC - R. Larsen

  4. Standard Extensions for Physics New xTCA Developments at SLAC - R. Larsen

  5. PICMG3.8 RTM Interface Standard Rear View 120 - IO Channels (3x40) IPMI, Power Connector (blue) 2 Mechanical Keys Courtesy M. Huffer, SLAC New xTCA Developments at SLAC - R. Larsen

  6. MTCA.4 Prototype Shelves & Modules Emerging New Electronics Standards - R. Larsen

  7. MTCA.4 - 12 Slot Shelf Dual Star Back-Plane Dual PU slot Dual MCH Slot 12 Payload AMC-RTMs Dual Star Redundant Front View New xTCA Developments at SLAC - R. Larsen

  8. II. SLAC xTCA Initiatives • Major SLAC program is Linac Coherent Light Source(LCLS) Machines • LCLSI (now operating using last1/3 of main linac) • LCLSII (just approved, using middle 1/3 of linac) • Each machine supports 6 or more large experimental areas (much larger than storage ring light source experiments) • Linac machine instrumentation needs lots of upgrades via Accelerator Improvement Programs (AIPs) New xTCA Developments at SLAC - R. Larsen

  9. SLAC Initiatives 2 • Experimental Areas • ATCA Massively Parallel Processors (MPP) generic module already deployed in several LCLSI experiments; 2nd generation MPP using new PICMG 3.8 interface • Linac RF & Controls • MTCA.4 demonstrations in development include • Reduced RF phase jitter to ~30 femtoseconds • Klystron FPGA-based interlocks • Beam Position Monitors for LCLSII Injector New xTCA Developments at SLAC - R. Larsen

  10. xTCA Status • LLRF for Main Linac S-Band 50MW station • Prototype developed, accelerator test planned for October 2011 (AIP program) • Struck digitizer AMC w/ SLAC designed RTM • Klystron Interlocks • Prototype development near completion, test planned on L-Band test station Q1-2 FY12 • TEWS FPGA AMC w/ SLAC designed RTM • BPM System • AIP program approved, commercial AMC digitizer w/ SLAC designed RTM, requirements in development New xTCA Developments at SLAC - R. Larsen

  11. LLRF MTCA & RF Chassis Testing RTM Section AMC Section RF head-end chassis in bench test MTCA.4 6-slot with AMC FPGA digitizer, timing, processor controlling intra-pulse feedback loop μRTM rear view New xTCA Developments at SLAC - R. Larsen

  12. RTM 10 Ch ADC-DAC, IPMI Interface • Rear Panel • 25 MHz IF Signals In • RF Ref In • Trigger in • Dual I&Q DAC Out Courtesy A. Young, SLAC Emerging New Electronics Standards - R. Larsen

  13. RTM FPGA Interlocks • REAR PANEL • INPUTS • DC and pulsed signals • 2 KSps and 60 MSps 12bit digitizers on board • OUTPUTS • Multiplexed serial to AMC via RTM interface • Works for short pulse or long pulse machines Courtesy D.G. Brown, SLAC Emerging New Electronics Standards - R. Larsen

  14. 8- BPM System Block Diagram EVR – Event Receiver (trigger over serial network) ADC – AMC BPM digitizer & FPGA processor, Industry units AFE – Analog Front End RTM (buffers, filters, calibration circuits Courtesy S. Hoobler et al, private communication New xTCA Developments at SLAC - R. Larsen

  15. Conclusions • PICMG3.8, MTCA.4 are major milestones • Software work continues • Guidelines on architecture, protocols; need active feedback from user case studies • SLAC Initiatives • ATCA Generic Massively Parallel Processors working in LCLSI experiments, Improved version in process • MTCA Opportunities underway to evaluate for three major subsystems • Industry providing infrastructure modules and key applications modules, SLAC designing first RTMs successfully • Goal is readiness for major LCLS system upgrades • Both lab and Industry COTS solutions critical New xTCA Developments at SLAC - R. Larsen

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