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Benchmarking Microelectronics Innovation: Understanding Moore’s Law and Semiconductor Price Trends. Kenneth Flamm Technology and Public Policy Program Lyndon B. Johnson School of Public Affairs University of Texas at Austin kflamm@mail.utexas.edu. Outline. Why Do We Care? Moore’s Law
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Benchmarking Microelectronics Innovation: Understanding Moore’s Law and Semiconductor Price Trends Kenneth Flamm Technology and Public Policy Program Lyndon B. Johnson School of Public Affairs University of Texas at Austin kflamm@mail.utexas.edu
Outline • Why Do We Care? • Moore’s Law • The Economics of Moore’s Law • The Economic Impact of Moore’s Law • Benchmarking Moore’s Law • Tinkering with Moore’s Law • Point of Inflection? • Official Data on Semiconductor Prices • Better Benchmarking
Key Economic Features of the Semiconductor Industry • Extremely rapid technical progress • Large R&D Investments • Learning Economies • Capital Intensity • Capacity Constraints, Long Gestation Lags • One Complicated Industry
Why Do We Care? • Now largest U.S. manufacturing industry • Measured by value added • One 4-digit manufacturing industry now almost 1% U.S. GDP • Most important input to other industries we care a lot about • Computers, communications • Big impact on GDP, productivity growth • See Jorgenson AEA 2001 Presidential Address.
1958 1965 1975 1985 1995 1997 .04% .09% .13% .26% .70% .77% Changing Size: U.S. semiconductor mfg val added vs. GDP
Moore’s Law • In the beginning: the original law • 2x devices/chip every 12 months • ca. 1965 • Moore rev.2 • 2x devices/chip every 18 months • ca. 1975 • Self-fulfilling prophecy? • “it happened because everyone believed it was going to happen” • The receding brick wall
Economics of Translating Moore into $ and ¢ $ processing cost area silicon Area/chip _____________________ Devices/chip $/device = New “technology node” every 3 years Lithography advance means .5X area per chip feature Moore’s law 4x devices/chip every 3 years Would predict Area/chip 2X every 3 years $ processing cost/wafer area roughly constant CADR = -21%
An Economist’s Default Corollary to Moore’s Law: Moore’s Law + constant wafer processing cost + new technology node every 3 years = -21 % CADR
The Ingenuity (DRAM) Corollary: • Instead of doubling chip size, use ingenuity to increase it only Z (Z < 2) times • real recent example (DRAMs), Z=1.37 • 3-D device structures • Implications of ingenuity • for DRAMs recently, CADR = -30% • for DRAMs, in 70s and 80s, wafer processing cost also fell, CADR more like -37% • Japan/VLSI project, competition impact? • Another example is ASICs, more rapid leading edge technology adoption • transitory impact on CADR
Benchmarking Moore’s law: Differences in Semiconductor Price Movements Are HUGE Source: Aizcorbe, Flamm, and Khurshid (2001).
Implications for Input Prices in Different User Industries Also Great Source: Aizcorbe, Flamm, and Khurshid (2001).
Accounting for the economic impact of Moore’s Law • The standard model • Estimated cost decline • Estimated price elasticity • Calculations of benefits
Summary of Consumer Welfare Calculations Benefit in 1995 of Billion $ Percent of GDP Percent of 1995 GDP Growth 1 year’s price decline 20 years’ price declines 30 years’ price declines 1.8 378 1503 0.16 5.2 21 8 260 1039 The Numbers:
Magnitudes • 1 year’s tech improvement yields .16% GDP …forever • 20 years’ tech improvement would cost you about 5 percent of GDP if rolled back • If you’re feeling really brave, roll the clock back 30 years and you shave off up to 20 percent of GDP!
More Comparisons • Other well-studied cases-- the railroads in the 19th century • The old guys vs. the new guys: a historical parable
Tinkering with Moore’s Law: The Technological Acceleration (Sematech Roadmap) Corollary • Suppose new technology node every 2 years instead of 3 • Industry coordinated push through Sematech in late 1990s • Competitive pressures also pushed • New default (2X chip size) CADR = -29% • New DRAM (1.37X chip size) CADR = -41% • Constant chip size (1X chip size) CADR = -50%
Point of Inflection? Decline Rates in Price-PerformancePercent/YearMicroprocessors, 1975-85 -37.5Hedonic Index 1985-94 -26.7DRAM Memory, 1975-85 -40.4Fisher Matched Model 1985-94 -19.9DRAMs, Fisher Matched Model, Quarterly Data 91:2-95:4 -11.9 95:4-98:4 -64.0Intel Microprocessors, Fisher Matched Model, Quarterly Data 93:1-95:4 -47.0 95:4-99:4 -61.6 Sources: Flamm (1997); Aizcorbe, Corrado, and Doms (2000)
Implications of This Interpretation of Moore’s Law • Ultra-high rate of innovation in late 1990’s temporary • Transitory factors increased innovation above long-term sustainable rates • Shortened product lives • Intensified competition • More rapid adoption of leading edge processes in other products • Future CADR will look more like –40% than –60%+ • Economic impacts may decline to lower but more sustainable rates
Benchmarking Moore’s Law in the U.S.: Official Statistics on Chip Prices • BEA got ball rolling, taken over by others • BLS-- Much improved for DRAMs and Microprocessors, not so hot for other products • Data sources a concern • Documentation a concern • Fed Reserve has stealth program, currently best numbers in town • Data sources a concern • Weights a concern • Possible application in estimating capacity a big concern • Access/availability outside Fed a concern
Comparison of BLS with Other Price Indexes for Microprocessors
Better Benchmarks for Semiconductor Innovation • Tracking it better in a time of change • Focus more scarce stat resources on price indexes for IT sectors, reflecting growing relative importance to economy • A real collection program for underlying price data, perhaps coordinated with industry trade organizations • Under the hood at Dataquest (& others) not a pretty story • Decent coverage of products besides memory and microprocessors • New initiatives in communications • Better understanding of R&D trends • Better coordination of public/private R&D investments