590 likes | 826 Views
Course Expectations. ECEN 5363 ANALOG VLSI. CHAP 1 IC DEVIDES AND MODELING CHAP 2 PROCESSING AND LAYOUT CHAP 3 SIMPLE CURRENT MIRRORS AND AMPS CHAP 4 NOISE ANALYSIS AND MODELING BASIC OTA DESIGN AND COMPENSATION ADVANCED CURRENT MIRRORS AND OTAS.
E N D
ECEN 5363 ANALOG VLSI • CHAP 1 IC DEVIDES AND MODELING • CHAP 2 PROCESSING AND LAYOUT • CHAP 3 SIMPLE CURRENT MIRRORS AND AMPS • CHAP 4 NOISE ANALYSIS AND MODELING • BASIC OTA DESIGN AND COMPENSATION • ADVANCED CURRENT MIRRORS AND OTAS
MOS Transistor Operation- Tri. VDS=50mV for Model Characterization in Triode – EXTACT – VT and Uo
MOS Transistor Operation- Sat. VDS> VT for Model Characterization in Saturation – EXTACT – Lambda
MOS parasitic- Caps Gate to Bdy Triode Off Sat Basis for a typical discussion question.
Bipolar Junction Transistor (BJT) Optional
Bipolar Junction Transistor Oper. Optional
BJT Large Signal Model Optional
Base Charge Storage sat. BJT Optional
BJT small signal model Optional
BJT small signal model Cs Optional
ft maximum current gain BW BJT Optional
Gain Bandwidth Product -(GBP) BJT Optional
Key SPICE MODEL Parameters • Diodes
SPICE MODEL Parameters • BJT a limited subset of key parameters
SPICE MODEL Parameters • MOSFET