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Introduction to CMOS Monolithic Active Pixel Sensors (MAPS)

Introduction to CMOS Monolithic Active Pixel Sensors (MAPS). Readout control. Column-parallel ADCs. I2C control. Data processing / Output stage. CMOS Monolithic Active Pixel Sensor (MAPS). (Re)-invented at the beginning of ’90s: JPL, IMEC, …. Standard CMOS technology

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Introduction to CMOS Monolithic Active Pixel Sensors (MAPS)

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  1. Introduction to CMOS Monolithic Active Pixel Sensors(MAPS)

  2. Readout control Column-parallel ADCs I2C control Data processing / Output stage CMOS Monolithic Active Pixel Sensor (MAPS) (Re)-invented at the beginning of ’90s: JPL, IMEC, … • Standard CMOS technology • all-in-one detector-connection-readout = Monolithic • small size / greater integration • low power consumption • radiation resistance • system-level cost • Increased functionality • increased speed (column- or pixel- parallel processing) • random access (Region-of-Interest ROI readout)

  3. RAL Large area sensors Vanilla/PEAPS 512x512 pixels 25 mm pitch ENC <~ 25 e- rms (kTC) Flushed reset 100 fps 12-bit SAR ADC Region-Of-Interest (ROI) readout: six 6x6 regions @20k fps EUVAPS04 12 million pixels 5 mm pitch Prototype for ESA Solar Orbiter Backthinned down to epi ENC = 17 e- rms RAL_HEPAPS4 1026x384 pixels 15 mm pitch ENC <~ 15 e- rms (reset-less) 5 MHz line rate Rad-hard: > Mrad

  4. Potential barriers - + - + - + Charged particles - + - + 100% efficiency; when NMOS design only - + - + - + - + - + MAPS for charged particle detection Radiation Metal layers Dielectric for insulation and passivation Polysilicon N+ N+ P+ N+ P-Well N-Well P-Well P-epitaxial layer (up to to 20 mm thick) R. Turchetta et al., NIM A 458 (2001) 677-689) P-substrate (~100s mm thick)

  5. Number of pixels in a “3x3” cluster Signal from individual particles Beta source (Ru106) test results. Sensors HEPAPS2. Cluster in S/N Signal spread

  6. 3T pixel Baseline (minimum) design. Low noise detection of MIPs first demonstrated in 2001. Since then, with a number of technologies/epi thickness: AMS 0.6/14, 0.35/∞, 0.35/14, 0.35/20, AMIS (former MIETEC) 0.35/4, IBM 0.25/2, TSMC 0.35/10, 0.25/8, 0.25/∞, UMC 0.18/∞ Noise <~ 10 e- rms Spatial resolution 1.5 mm@ 20 mm pitch, with full analoguereadout Good radiation hardness Low power Speed: rolling shuttercan be a limit

  7. In-pixel digitisation • OPIC (On-Pixel Intelligent CMOS Sensor). Designed by RAL within UK MI3 consortium • In-pixel ADC (single-slope 8-bit) • In-pixel TDC • Data sparsification Test structure. 3 arrays of 64x72 pixels @ 30 mm pitch Fabricated in TSMC 0.25/8 PMOS in pixel  sub-100% efficiency Starting point for R&D on ILC-ECAL Calice Image obtained with the sensor working in TDC mode with sparse data scan. White pixels are those which didn’t cross threshold

  8. Experimental results In-pixel thresholding In-pixel ADC Timing mode capture Sparse data (timing mode)

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