300 likes | 541 Views
KS NOTE Power Sequence. NDK100 : Jimmy Chen. KS Note Block Diagram. H8. Power Block Diagram. 2. VCCXM_ON. 8. 1. VCCXA_ON. POWER. M_ON. TSURUMA. PWR_SW. A_ON. VCCXB_ON. 7. PMH7. B_ON. 5. 3. MPWRGD. BPWRGD. 9. 6. 4. PCI DEVICE. SLP_S3 . SLP_S4. PWR_SW_H8. 13.
E N D
KS NOTE Power Sequence NDK100 : Jimmy Chen
H8 Power Block Diagram 2 VCCXM_ON 8 1 VCCXA_ON POWER M_ON TSURUMA PWR_SW A_ON VCCXB_ON 7 PMH7 B_ON 5 3 MPWRGD BPWRGD 9 6 4 PCI DEVICE SLP_S3 . SLP_S4 PWR_SW_H8 13 PCIRST PLTRST SB BPWRGD NB CPU_PWRGD (BPWRGDX VR_PWRGD) 12 11 14 CPURST VR_PWRGD ADP 3207 CPU 10 VCCCPUCORE
U74 VCC3SW VREGIN19 因此只要power VREGIN19 supply to U74 , 無須控制信號U74產生VCC3SW
M1_ON U72 Control Signal EXTPWR_PMH be sent to U72 , 然后產生Control Signal M1_ON/M2_ON/AUX_ON EXTPWR_PMH M2_ON PWH7 AUXON
這里順便了解一下PWH Control Signal Sequence • System detect EXTPWR OK then generate M_ON & AUX_ON • System detect PWRSTWITCH OK then generate A_ON &B_ON , • 也就是說﹕ • System generate M_ON & AUX_ON before pressing power button • System generate A_ON & B_ON after pressing power button