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News on production at IZM / Twente. Yevgen Bilevych. CERN 22.02.2012. Main technological steps for the formation of structure TimePix chip or dummy substrate / spacer / Al grid. 1. Formation of protection layer.
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News on production at IZM / Twente Yevgen Bilevych CERN 22.02.2012
Main technological steps for the formation of structure TimePix chip or dummy substrate / spacer / Al grid 1. Formation of protection layer 2. Deposition of spacer material 3. Deposition of Al thin film 4. Formation of “support” / grid
GemGrid IZM, Berlin and University of Bonn200 mm silicon dummy wafer Main technological steps for the formation of GemGrid structure 1. Aluminum deposition (bottom electrode) 2. Deposition of BCB 3. Formation of Al grid Chip 4. Dry etching of BCB Chip
GemGrid NIKHEF and University of TwenteTimePix single chip Main technological steps for the formation of structure TimePix chip / SiO2 or SU-8 / Al grid 1. Formation of SixNy layer 2. Deposition of SiO2 or SU-8 3. Formation of Al grid Chip 4. Dry wet etching of SiO2 or wet etching of SU-8
SiO2 SU-8
InGrid University of Bonn, IZM Berlin, NIKHEF and University of Twente200 mm TimePix wafer Main technological steps for the formation of structure TimePix wafer / SU-8 pillar / Al grid 1. Formation of SixNy protection layer 2. Deposition of SU-8 3. Pillars-like structure formation 4. Formation of Al grid Chip 5. Development of SU-8
before now • Main problems: • formation of protection layer • deposition of Al • final development of SU-8
Polyimide mask • Microsystems HD 4100 polyimide - negative tone, solvent developed, photodefinable polyimide • Steps: • Spinning • Baking • Exposition • Development • Silicon nitride deposition • Chemical activation of polyimide • Stripping • Advantage: • Silicon technology compatible • Perfect alignment • No residuals • Disadvantage: • Temperature sensitive process • Time consuming process • mechanical scratching of bonding pads
deposition of Al layer Sputtering system Leybold Z660 DC 50%, no sputter etching, 30 sec – the deposition time for every sputtering run, + cooling delay Total thickness: ~ 800 nm
Development of SU-8 • Acetone • Acetone:IPA:H2O (1:1:2) • Acetone:IPA:H2O (1:1:1) • Acetone:IPA (1:1) • Microstrip 6001 • H2O • IPA • Acetone • Drying in the air
Conclusion • 200 mm TimePix wafer / SixNy / SU-8 pillars / Al grid • - yield of high quality InGrids about 70% • 2. Single TimePix chip / SixNy / SiO2 (hole) / Al grid • 3. Single TimePix chip / SixNy / SU-8 (hole) / Al grid • 4. 200 mm silicon wafer / BCB (hole) / Al grid