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Pulsar Hardware Status

Pulsar Hardware Status. March, 14 th 2003. Burkard Reisert (FNAL). Two New Pulsar Boards (from Prototype Batch). Visual Inspection: missing, wrong, misplaced components (mostly termination resistors) - fixed - BOM and assembly plan corrected

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Pulsar Hardware Status

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  1. Pulsar Hardware Status March, 14th 2003 Burkard Reisert (FNAL)

  2. Two New Pulsar Boards (from Prototype Batch) • Visual Inspection: • missing, wrong, misplaced • components • (mostly termination resistors) • - fixed • - BOM and assembly plan • corrected • Both boards configured as • Hotlink RX Board • for tests of • Hotlink Fiber RX mezz. cards • Successful Testing

  3. Pulsar Test Stand PC Gigabit Ethernet or Slink to PCI Automated VME RAM Tests AUX Steering file defining: #SLOT FPGA RAM loop nwords pat. TRACER Test Clock 13 CONTROL INT WR 10000 256 1 0 1 13 DATAIO1 SRAM WR 1000 131072 2 0 1 8 CONTROL INT WR 10000 256 3 0 fff : : : : : : : : : TSTL2TRG1 Pulsar Transmitter (Tx) Pulsar Receiver (Rx) Pulsar Receiver (Rx) Pulsar Receiver (Rx) Flexible testing: not a single error in ~ 10 millions per Test Easily extendable to more Pulsar boards, VME RAMs 4 Tx Hotlink MezzCards 4+12 Rx Hotlink MezzCards

  4. Production of HOTLINK Fiber Receiver (Rx) Cards Fruit full UC & Fermilab Cooperation 03/03 components collected at UC 03/05 first item from PPD-EED 03/06 test of first item completed go for production 03/07-03/11 production completed within 3 working days Thanks to Bob Demaat, Bob Jones and Paula, who did a great job 03/12-03/13 tests of Hotlink Mezz. Rx cards Careful preparation pays off only one card failed first test Plug & Play (well almost, metric screws needed) The Hotlink Receiver Arsenal: 12 New Rx Mezz. Cards +4 Prototypes + spare parts for 2 more complete cards

  5. Production of HOTLINK Fiber Transmitter (Tx) Cards Continue the fruit full UC & Fermilab Cooperation 03/04 components collected at UC 03/14 first item being produced by PPD-EED test first item as soon as it is available go for production after careful testing Production and Testing completed feasible by Friday next week

  6. New Prototypes 1 AUX CARD 2 TAXI Receiver All at FNAL adjustment of firmware for testing 2 TAXI Transmitter

  7. Sakariis back since Monday, this makes a difference Development of Core firmware : DataIO FPGA (Rx case) VME responses DAQ buffers SRAM interface CDF Ctrl interface Mezzanine Card interface down stream up stream Filter algorithm SLINK formatter Play/record Play/record RAM/ Spy buffers RAM/ Spy buffers direct monitoring input data and control lines will ease testing of Hotlink and Taxi mezz. cards Focus of Development of the week 1st Version exist being developed

  8. E1: near term goals from last meeting • (1) Feb:have the automated testing procedure fully working for 16 • hotlink channels (muon path): Tx->Rx->PC; • (2) March:finish testing 2 more Pulsar boards with hotlink/Taxi mezzanine • cards and AUX cards; • (3) April: initial proof of principle test with S32PCI64 with test setup • (4) May: core firmware (Tx/Rx) fully developed and tested with • hotlink/taxi mezzanine cards; • (5) June: production/testing for Pulsar/hotlink/taxi/AUX cards • (6) July: have Tx->Rx-PC fully developed for Reces(taxi), • cluster/Isolation (hotlink/taxi); • (7) Aug: document everything above: cdf note DONE DONE Rx DONE

  9. Goals for the coming months • March: • finish Hotlink Tx production/testing • finish testing Taxi and AUX card prototypes • improving Pulsar core firmware • April: • continue improving firmware • preparing Taxi/AUX card production • if possible, initial test with • Pulsar TxRxS32PCI64CPU

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