1 / 10

TEAM 1k Design overview

TEAM 1k Design overview. LBNL group 8/25/09. Sensor. TEAM 1k 1024x1024 16 outputs Vhigh, Vlow. Voltage reference. DACs. 13 DAC 7811 6 Voltage output 7 current output Analog J1-35: Bias-n3SRE: 300 uA to GND J1-36: Bias-n3SBuf: 300 uA to GND J1-37: Bias-PreDrv: 100 uA to GND

dalton-franks
Download Presentation

TEAM 1k Design overview

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. TEAM 1kDesign overview LBNL group 8/25/09

  2. Sensor • TEAM 1k 1024x1024 • 16 outputs • Vhigh, Vlow

  3. Voltage reference

  4. DACs • 13 DAC 7811 • 6 Voltage output • 7 current output • Analog • J1-35: Bias-n3SRE: 300 uA to GND • J1-36: Bias-n3SBuf: 300 uA to GND • J1-37: Bias-PreDrv: 100 uA to GND • J1-38: BiasPin: 500 uA to GND • J1-39: BiasNin: 20 uA to VDD • Digital part • J2-36: BiasPin BIAS: 100 uA to GND • Voltages • Pos rail : 35mA • VDDR: ? • Pos Rail Analog: 22mA

  5. DAC7811 *For voltage buffer OPA277 (U612 in this picture) was substituted by BUF63

  6. Clock

  7. Clock wave forms External signals are only Reset (RINIT), CCk1, CCk2

  8. Hybrid board

  9. Differential Drivers

More Related