Flip-Flops

1. Flip-Flops • Last time, we saw how latches can be used as memory in a circuit. • Latches introduce new problems: • We need to know when to enable a latch. • We also need to quickly disable a latch. • In other words, it’s difficult to control the timing of latches in a large circuit. • We solve these problems with two new elements: clocks and flip-flops • Clocks tell us when to write to our memory. • Flip-flops allow us to quickly write the memory at clearly defined times. • Used together, we can create circuits without worrying about the memory timing. Flip-flops

2. Two main issues • So to use latches correctly within a circuit, we have to: • Keep the latches disabled until new values are ready to be stored. • Enable the latches just long enough for the update to occur. • There are two main issues we need to address:  How do we know exactly when the new values are ready? We’ll add another signal to our circuit. When this new signal becomes 1, the latches will know that the Circuit computation has completed and data is ready to be stored.  How can we enable and then quickly disable the latches? This can be done by combining latches together in a special way, to form what are called flip-flops. Flip-flops

3. clock period Clocks and synchronization • A clock is a special device that whose output continuously alternates between 0 and 1. • The time it takes the clock to change from 1 to 0 and back to 1 is called the clock period, or clock cycle time. • The clock frequency is the inverse of the clock period. The unit of measurement for frequency is the hertz. • Clocks are often used to synchronize circuits. • They generate a repeating, predictable pattern of 0s and 1s that can trigger certain events in a circuit, such as writing to a latch. • If several circuits share a common clock signal, they can coordinate their actions with respect to one another. • This is similar to how humans use real clocks for synchronization. Flip-flops

4. Clocks and synchronization • In order to make sure that timing isn’t an issue, use a signal to tell the flip-flop when to change. • • This signal is called a clock, and produces a high pulse at regular intervals • – duration of clock pulse (pulse width) must be long enough to allow all • propagation delays to settle down. • – time between clock pulses (period) must be long enough for the rest of • the circuit to process the new flip-flop output value. Flip-flops

5. Flip-Flops • Flip-Flops are synchronous bi-stable devices, known as bi-stable multivibrators. Flip-flops have a clock input instead of a simple enable input as discussed earlier. • In Synchronous systems (i.e. flip-flops), the output of all the digital circuits changes when a clock signal is applied instead of the enable signal. The change in the state of the digital circuit occurs either at the low-to-high or high-to-low transition of the clock signal. • Since the transition of the clock signal is for a very short a precise time intervals thus all digital parts of a Digital system change their states simultaneously. • The low to high or high to low transition of the clock is considered to be an edge. • Four different types of edge-triggered flip-flops are generally used in digital logic circuits. • S-R edge-triggered flip-flop • D edge-triggered flip-flop • J-K edge-triggered flip-flop • T edge-triggered flip-flop Flip-flops

6. Type of Triggering • Type of triggering • Untriggered (asynchronous) • Level-triggered (C=1) • Edge-triggered (rising or falling edge of C) • Each Edge-triggered flip-flop has two variations: • Positive edge-triggered. • Negative edge-triggered. • Positive edge-triggered: A positive edge-triggered flip-flop changes its state on a low-to-high transition of the clock. • Negative edge-triggered. A negative edge-triggered flip-flop changes its state on a high-to-low transition of the clock. Flip-flops

7. Edge-Detection Circuit • The edge-detection circuit which allows a flip-flop to change its state on either the positive or the negative transition of the clock is implemented using a simple combinational circuit. The edge detection circuit that detects the positive and the negative clock transition are shown in figure: (a) Positive clock edge detection circuit & timing diagram (b) Negative clock edge detection circuit & timing diagram Flip-flops

8. Level-Triggered S-R Flip-flop • Here is an SR latch with a control input C. • Notice the hierarchical design! • The dotted blue box is the S’R’ latch. • The additional NAND gates are simply used to generate the correct inputs for the S’R’ latch. • The control input acts just like an enable. Flip-flops

9. Edge-Triggered S-R Flip-flop Logic Symbol & Truth Table of Positive and Negative edge triggered S-R flip-flops Flip-flops

10. Edge-Triggered S-R Flip-flop Timing diagram of a Positive Edge triggered S-R flip-flop Flip-flops

11. Edge-Triggered S-R Flip-flop Timing diagram of a Negative Edge triggered S-R flip-flop Flip-flops

12. Edge-Triggered D Flip-flop Logic Symbol &Truth-Table of Positive and Negative edge triggered D flip-flops Flip-flops

13. Edge-Triggered D Flip-flop Timing diagram of a Positive Edge triggered D flip-flop Timing diagram of a Negative Edge triggered D flip-flop Flip-flops

14. Edge-Triggered J-K Flip-flop • The J-K flip-flop is widely used in digital circuits. Its operation is similar to that of the S-R flip-flop except that the J-K flip-flop doesn’t have an invalid state, instead it toggles its state. The circuit diagram of a J-K flip-flop Flip-flops

15. Edge triggered J-K flip-flops Truth-Table & Logic Symbol of Positive and Negative Edge triggered J-K flip-flops Flip-flops

16. Edge triggered J-K flip-flops Timing diagram of a Positive & Negative Edge triggered J-K flip-flop Flip-flops

17. T flip-flop • With a slight modification of a J-K flip-flop, we can construct a new flip-flop called a T (toggle) flip-flop. • If the two inputs J and K of a J-K flip-flop are tied together it is referred to as a T flip-flop. Hence, a T flip-flop has only one input T and two outputs Q and Q'. • The name T flip-flop actually indicates the fact that the flip-flop has the ability to toggle. It has actually only two states—toggle state and memory state (i.e. can only maintain or complement its current state). Flip-flops

18. Application of Flip-Flops • Read Floyd Book Flip-flops

19. Inter-Conversion of Flip-flops • In many applications, we are being given a type of fl ip-fl op, whereas we may require some other type. In such cases we may have to convert the given flip-flop to our required flip-flop. Now we may follow a general model for such conversions of flip-flops. These model are present in the following book • Digital Principles and Logic Design By A. SAHA & N. MANNA • Section: 7.11 INTERCONVERSION OF FLIP-FLOPS • Pages: 237-247 Flip-flops

20. Characteristic tables • The tables that we’ve made so far are called characteristic tables. • They show the next state Q(t+1) in terms of the current state Q(t) and the inputs. • For simplicity, the control input C is not usually listed. Flip-flops

21. Characteristic equations • We can also write characteristic equations, where the next state Q(t+1) is defined in terms of the current state Q(t) and inputs. Q(t+1) = D Q(t+1) = K’Q(t) + JQ’(t) Q(t+1) = T’Q(t) + TQ’(t) = T  Q(t) Flip-flops

22. 1 2 3 4 C J K Q 1 2 3 4 C J K Q … determine the “next” Q These values at clock cycle 1... Flip flop timing diagrams • “Present state” and “next state” are relative terms. • In the example JK flip-flop timing diagram on the left, you can see that at the first positive clock edge, J=1, K=1 and Q(1) = 1. • We can use this information to find the “next” state, Q(2) = Q(1)’. • Q(2) appears right after the first positive clock edge, as shown on the right. It will not change again until after the second clock edge. Flip-flops

23. 1 2 3 4 C J K Q 1 2 3 4 C J K Q “Present” and “next” are relative • Similarly, the values of J, K and Q at the second positive clock edge can be used to find the value of Q during the third clock cycle. • When we do this, Q(2) is now referred to as the “present”state, and Q(3) is now the “next” state. Flip-flops

24. Summary • To use memory in a larger circuit, we need to: • Keep the latches disabled until new values are ready to be stored. • Enable the latches just long enough for the update to occur. • A clock signal is used to synchronize circuits. The cycle time reflects how long combinational operations take. • Flip-flops further restrict the memory writing interval, to just the positive edge of the clock signal. • This ensures that memory is updated only once per clock cycle. • There are several different kinds of flip-flops, but they all serve the same basic purpose of storing bits. • Next time we’ll talk about how to analyze and design sequential circuits that use flip-flops as memory. Flip-flops