1 / 21

Building Pixel Detector Modules in Multi Chip Module Deposited Technology

Building Pixel Detector Modules in Multi Chip Module Deposited Technology. IEEE Nuclear Science Symposium Roma Oct.2004. Originally…. …this talk should have been given by my colleague Christian Grah. Here you can see, how he looks like, at least.

elam
Download Presentation

Building Pixel Detector Modules in Multi Chip Module Deposited Technology

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Building Pixel Detector Modules in Multi Chip Module Deposited Technology IEEE Nuclear Science Symposium Roma Oct.2004

  2. Originally… …this talk should havebeen given by my colleagueChristian Grah.Here you can see, how he looks like, at least. But if you would have met him during the last years, he probably looked as shown on the right picture! Christian Grah Now at Desy Zeuthen(Berlin, Germany) NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  3. Subject of this talk Application of a ‘thin’ film technology on a high energy physics detector. • Hybrid pixel detector (ATLAS, LHC, CERN) • Definition • Geometrical constrains • Thin film technology • Explanation of the process • Typical dimensions • Introduce some prototypes build,gaining from a strong support of • The ATLAS pixel detector project • Fraunhofer Institute IZM (Berlin, Germany) • Structures realised • Results optained • Laboratory and • test-beam environment • Summary (How to…) NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  4. Hybrid Pixel Detector Three parts: • Sensor • High quality silicon wafer • PiN structure • Segmentation into ‘pixels’ • Readout Electronics • Interconnection • Sizes for e.g. ATLAS Pixel: • Module 2x6cm² • 16 readout chips • ~50.000 pixels à 50x400µm NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  5. „ATLAS Flex“ Interconnect Sensor FE FE Interconnect via Kapton-foil • 3D design • note control chip and components on top • >500 wire-bonds per module • Sensor has to cover gaps in electronics NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  6. „ATLAS MCM-D“ FE FE Interconnect Sensor Interconnect integrated NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  7. MultiChipModule-Deposited Technology Spin-On BCB (Benzocyclobuthen) Photolithographic structuring/exposure Developing and stripping of unexposed BCB (soft-cure) Sputtering of Cu – plating base layer Spin-On and structuring of Photo-Resist Electroplating of Cu – layer Stripping of Photo-Resist and etching of plating base Spin-On next BCB layer ( h) = a) ) NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  8. MCM-D wafer after processing 10cm NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  9. 75µm 75µm 50µm 500µm MCM-D structures Different scales! contact to power distribution system contact to signal bus system contact for Probecard (process monitoring) pixel matrix - feedthroughs NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  10. MCM-D Module Prototype readout chips NTC, capacitors and LVDS termination MCC Kapton flex circuit VBias (backside) NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  11. Up to 5 copper layers: magnetron sputtered up to 300nm Ti:W/Cu additive electroplatingup to 3mm Cu Minimal width 15µm spacing 15µm Final metallisation: 5mm Cu/200nm Au 5mm Cu/Ni/200nm Au “Spin-on” polymer: BCB(Benzocyclobutene / DOW:CYCLOTENE™) Photosensitive Specific dielectric constant er= 2.7 Process temperatures :1h 220C per layer last layer 1h 250 C Thickness / layer 2 - 6mm Via  >22mm, Pad >25µm MCM-D, geometry conductor layers dielectric layers NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  12. MCM-D Module Prototype NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  13. Geometrically Optimized Pixel Sensor optimized sensor layout (Equal-sized Bricked): conventional sensor layout: (inter-chip region) special thx to Tilman Rohe drawn: sensor layout, top metal layer NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  14. 50µm 20µm 200µm Routing structures BCB is etched for visualisation (except of some pillars) NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  15. Equal - Sized - Bricked single chip assembly: distribution of threshold Counts per bin threshold / e- threshold / e- Pixel number No influence of the thin film structures, nor the bricked sensor structure visible NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  16. Equal - Sized - Bricked single chip assembly: distribution of noise Counts per bin ENC / e- ENC / e- Pixel number No influence of the thin film structures, nor the bricked sensor structure visible NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  17. Testbeam data • H8 Testbeam at SPS (CERN) • primary: 450 GeV protons • Data was mainly taken with:180 GeV pions • Telescope with 4 x 2 layers of strip-detectors (Strip pitch: 50 µm) H8 Telescope system NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  18. Charge collection of equal sized bricked base-cell Charge collection very uniform with expected behaviour of bias grid contacts NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  19. Charge collection forsingle, double and triple hits Slight charge deficit of double hits is dueto high threshold (chosen by mistake). This fits to the expected/seen numberof triple hits. NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  20. nice higher manageability and better handling of a module bump bonds only (no wire-bonding) sensor cell geometry can be optimized reduced assembly steps rework of full assembled module possible (detach and reattach of chips) options of final metallization (Cu/CuNi/CuAu/CuNiAu/PbSn) allow different technologies higher degree of automation during production not so nice increased size (but reduced height) lower testability (reduced access to inter-chip signals) high complexity of the process (find vendor) Experience with MCMD successfully operated a radhard pixel detector MCMD module performance compatible with Flex modules Cooling ok (chip up design) successfully increased thin film yield defect tolerant design with reduced "critical" area high demand on cleanliness (includes new machinery and optimization of process flow) Summary NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

  21. Sensor: 1 module per 4” wafer sensor dedicated for MCMD (including dicing streets and 1cm rim) Make use of geometrical optimizations! Electronics: Known good die problem of Multi-Chip Moduleis relaxed by the reworking option prototyping restrictions: changes in pin-out are expensive (money and time)! thinning: depending on the interconnection technique (reflow)thin chips get bowed during heating up Thin Film Design: defect tolerant design recommended set of design rules has been developed Metal-lines: 15/15um; Via 22um Layer number vs. effort is not linear! Thin Film Processing: automation <=> cleanliness industry keeps increasing wafer size NO PROBLEM for MCM-D, but 4 inch wafer (Sensors) processing might become a problem How to build MCMD Modules: NSS Roma 2004; P.Gerlach (Ch.Grah);Multi Chip Module Deposited

More Related