MEMS 2 (based on chapter 29) sami.franssila@aalto.fi

1. MEMS 2 (based on chapter 29) sami.franssila@aalto.fi

2. Isotropic etching • Proceeds as a spherical wave • Undercuts structures (proceeds under mask) • Most wet etching processes are isotropic e.g. HF etching of oxide, H3PO4 etching of Al

3. Isotropy: good and bad If you want closely spaced lines (as in comb-drive capacitor), undercutting is bad, but if...

4. Undercutting in action: dome resonator RIE etching a small hole in polysilicon Isotropic HF wet etching of oxide under polysilicon  Membrane can move H. G. Craighead

5. Applications

6. Generic structure anchor Structural material Sacrificial material Substrate material Structural material anchor Substrate material

7. Single mask SOI accelerometer • Device silicon DRIE • Buried oxide HF wet etch • Rinse & dry

8. Two mask process Single mask process mask #1 mask mask #2 Single mask vs. two mask cantilever Etch structural layer with resist mask Etch structural layer with resist mask Etch sacrificial layer without resist Etch sacrificial layer without resist

9. Material pairs & etchants Structural film Sacrificial film Sacrificial etch(es) polysilicon oxide HF, HF vapor silicon nitride oxide HF silicon nitride Al NaOH, H3PO4 nickel Cu HCl nickel resist oxygen plasma aluminum resist oxygen plasma gold Cu HCl gold resist oxygen plasma copper resist oxygen plasma Parylene resist acetone, other solvents SU-8 Cu HCl

10. HF etching of SiO2 and other materials Etchant Material SiO2TEOS PSG Si3N4 Al Mo HF (49%) 1763 3969 4778 15 38 0.15 BHF 133 107 1024 1 3 0.5 1:10 HF 48 157 922 1.5 320 0.15 Etch rates in nm/min

11. Different silicon dioxide films

12. Thermally excited resonator • Oxide deposition • Poly deposition • Lithography piezores • I/I piezo doping & strip • Anneal I/I • Au depo • Litho for heater • Au heater etch & strip • Litho for poly hole • Poly etch & strip • Oxide wet etch in HF • Rinse & dry poly oxide

13. Lateral-field-excited (LFE) piezoelectric AlN contourmode Zuo et al.: CMOS oscillator based on contour-mode MEMS resonators, IEEE 2010

14. LFE AlN fabrication (a) AlN sputter deposition on top of Si wafers (b) top Pt electrode deposition by lift-off (c) AlN lithography and plasma etching using Cl2 and BCl3, into Si (d) structure release by Si dry etching in XeF2. Zuo et al.: CMOS oscillator based on contour-mode MEMS resonators, IEEE 2010

15. Lateral-field-excited (LFE) piezoelectric AlN contourmode Zuo et al.: CMOS oscillator based on contour-mode MEMS resonators, IEEE 2010

16. Perforation to release large area structures

17. aluminum membrane oxide N+ diffusion Microphone • 0.Wafer silicon • Thermal oxide • 1st litho for diffusion • Etch oxide & strip resist • Clean • N+ diffusion • Etch all oxide away • CVD oxide deposition • 2nd litho: contact to n+ • Etch oxide & strip resist • Aluminumsputtering • 3rd litho: aluminum pattern • Etchaluminum & strip resist • Etchoxide, rinse & dry

18. Stiction (sticking + friction) Capillary force of liquid exceeds mechanical strength of the released beam

19. Stiction prevention • Replace water by something that has lower surface tension, like isopropyl alcohol • Use stronger structures (H, T, I, U beams) • Change structural material • Redesign so that shorter beams needed • Use more elaborate drying • Use dry release  no drying needed

20. Alternative drying

21. Stiffening beam by 3D shaping

22. Stiction prevention: dry release Other dry releases: • XeF2 dry etching of silicon • SF6 isotropic plasma etching of silicon • HF-vapor etching of oxide

23. Compressive stresses in film buckling Depends on span on the structure: short beams do not buckle; and hard materials less prone than soft.

24. Tensile stress in film Desired stress state in most cases; too much tensile stress leads to cracking.

25. Marc Madou

26. RF switch Off-state when up. On-state when pulled down.

27. Electroplated gold switch

28. Electroplated gold switch

29. Critical release gap Gap height is critical for device operation. These gaps are often ~ 1 µm in size. Actuation voltage depends on gap height. Optical path length depends on gap.

30. Non-critical release gap Gap provides space so that elements can move; or gap provides thermal isolation. Large: >> 1 µm

31. Sideways movement thermal switch

32. Sideways movement thermal relay/switch

33. Hinged structures (1)

34. Hinged structures (2)

35. Hinged structures (3)

36. µ-mirror array on CMOS

37. Zero-level package by thin films

38. Packaging by deposition

39. a b c Problems with thin film roofs • cracks • outgassing • collapse

40. Packaging by wafer bonding -needs an additional wafer -electrical feedthroughs ? -degree of hermeticity needed ?

41. Bulk vs. surface • in bulk micromechanics <Si> is etched by either KOH or DRIE • structure heights 380 µm/500 µm • in surface micromechanics thin films (oxide, nitride, poly, aluminum) are used • structure heights 1-2 µm typically (=sputter & CVD film thicknesses) or 5-50 µm if SOI or thick poly used