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Novel universal threshold logic gate based on RTD. Authors: Yi Wei, Jizhong Shen Speaker : Chia-Chun Lin 2012/2/15. Outline. Introduction linear threshold gate Universal threshold logic gate (UTLG) Linearly separable functions Logic function implementation with UTLG Example 1
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Novel universal threshold logic gate based on RTD Authors: Yi Wei, JizhongShen Speaker: Chia-Chun Lin 2012/2/15
Outline • Introduction • linear threshold gate • Universal threshold logic gate (UTLG) • Linearly separable functions • Logic function implementation with UTLG • Example 1 • Example 2
Linear threshold gate • A linear threshold gate (LTG) is an n binary input and one binary output function defined as below: f = 1, if 0,if a b c 2 1 1 3 f Fig. 1: A linear threshold gate and its corresponding weight-threshold vector [ 2, 1, 1; 3].
Introduction X1 X2 X3 X1 X2 X3 1 1 1 -1 -1 -1 3 0 Fig. 2: Implementation of example:(a)circuit of f1 and (b)circuit of f2. Figures are the RTD-based circuit implementations of two different functions f1 and f2.
Universal threshold logic gate (UTLG) Fig. 3: Three-input UTLG. (a) is the circuit schematic of proposed element UTLG, and figure (b) is the symbol of UTLG. f = 1, if 0, otherwise
Universal threshold logic gate (UTLG) x1 x2 0 0 x3 1 Fig. 3: Three-input UTLG. (a) is the circuit schematic of proposed element UTLG, and figure (b) is the symbol of UTLG. f = 1, if 0, otherwise
Linearly separable functions All true minterms All false minterms Fig. 4: Concept of linear-separability.
Linearly separable functions X1 X2 X3 X1 X3 X1 X3 X2 2 1 1 2 1 1 1 1 2 2 1 1 3 3 3 3 Same NPN algebraic classification group!! Fig. 5: Boolean and spectral domain.
Universal threshold logic gate (UTLG) • Given a n-variable function , it has 2n input-output conditions, and the output vector Y in the {+1, -1} domain can be define as • Then the spectral-coefficient vector s is given by
Universal threshold logic gate (UTLG) • Tnis an incomplete binary orthogonal matrix, and T3 is given as follows Fig. 6: The spectral-coefficient classification table for all the three-input variables .
Universal threshold logic gate (UTLG) • Some conclusion are noted: • The are computed and arranged in numerically descending magnitude order. The against the appropriate may be used to derive the integer and for the threshold function. And the sign of is the same as . Meanwhile, can be calculated as
Universal threshold logic gate (UTLG) • If the function is not threshold, the derived number will not appear in the classification table. • Based on above, the expression of three-variable threshold function is rewritten as
Example 1: s0 s1 s2 s3 s1 s0 s2 s3 a1 a0 a2 a3
Example 1: • Based on this threshold function can express as
Example 2: s0 s1 s2 s3 s1 s0 s2 s3
Example 2: s0 s1 s2 s3 s0 s1 s2 s3 a0 a1 a2 a3
Example 2: • Based on this threshold function can express as
Example 2: Fig. 7: UTLG implementation of Example2. Figure shows the circuit, which realizes the functioninExample2.