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ECE 353 Introduction to Microprocessor Systems. Michael J. Schulte. Week 8. Administrative Matters. Homework #4 is due Friday, April 4 th , 2008 Quiz #2 is rescheduled for Thursday, April 10 th from 7:15 to 8:30 Reading for week8 ADuC702X Datasheet 53-60, 71-73, 75-79
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ECE 353Introduction to Microprocessor Systems Michael J. Schulte Week 8
Administrative Matters Homework #4 is due Friday, April 4th, 2008 Quiz #2 is rescheduled for Thursday, April 10th from 7:15 to 8:30 Reading for week8 ADuC702X Datasheet 53-60, 71-73, 75-79 Discussion section on Wednesday To cover hardware times and general purpose I/O
Topics • Logic Compatibility • Microprocessor peripherals • Timers • Periodic • Watchdog • Real-time • ADuC7026 timers • Pulse-width modulators (PWM) • Direct memory access (DMA)
Logic Compatibility • Logic family characteristics • Definitions • Logic families • DC noise margins • Driver characteristics • Receiver characteristics • Compatibility • Voltage • Current • Capacitive loading • Exercises
Current Compatibility • Currents defined positive in and negative out
Timer Peripherals • Timer/counter modules used to • Generate signals with specified frequency / duty cycle • Count external events, measure pulse width • Generate absolute delays, periodic interrupts • Building a timer peripheral • Basic free-running timer • Periodic timer enhancements • Clock selection and prescaling • Adding capture capability
Real-Time Clocks (RTCs) • RTCs provide microprocessor systems with absolute time information • Absolute time does not necessarily mean calendar/clock time • Typically operate from 32.768KHz crystal with battery or capacitor back-up power supply • Generate periodic interrupts • Often contain a small amount of RAM – historically this was where the PC stored its configuration (BIOS) settings since it was non-volatile. • Dallas Semiconductor DS1375
Watchdog Timers • Watchdog timers are used to guard a system against lock-up due to software errors or soft failures in hardware • Often included in microcontrollers and CPU supervisor circuits. • Retriggering of watchdog timer is usually done in the main program loop • Watchdog output can be used to reset the CPU or as a nonmaskable interrupt (NMI) • Maxim MAX6323/MAX6324
ADuC7026 Timers • Timer0 • A basic periodic timer, intended to be used as the RTOS timer • 16-bit counter, free-running or period register • CPU core clock with prescaler • Generates interrupt and/or ADC conversion trigger • MMRs
ADuC7026 Timers • Timer1 • General-purpose timer • 32-bit counter • Multiple clock sources with prescaler • Capture register • Binary or H:M:S formats
ADuC7026 Timers • Timer2 • Wake-up timer • 32-bit counter • Can run on 32kHz clocks • Binary or H:M:S format
ADuC7026 Timers • Timer3 • Watchdog or general-purpose timer • 16-bit counter • 32kHz clock sources • Watchdog timer is reset by writing to T3CLRI MMR • Requires pseudo-random sequence in secure clear mode
PWM Peripherals • A basic pulse-width modulator peripheral creates a rectangular wave whose duty cycle can be controlled • PWM allows us to control the average power delivered to a load • The ADuC7026 contains a very capable 3-phase PWM that is intended to do motor control
DMA Controllers • Direct memory access (DMA) controllers are peripherals devices designed to offload data movement from the processor • A common use is in servicing peripherals by collecting a frame of data for the CPU to work on, or sending out a frame of data to a peripheral as it needs it • To use DMA, we need to • Program the DMA controller for the task • Processor does other things • The DMA controller interrupts the processor when it has completed. • DMA controllers usually have an auto-reload feature to do a repetitive task without the CPU having to reconfigure it every time.
DMA Controllers (cont) • Typical DMA controllers are programmed with the following information • Source address and destination address • Should address be modified at each transfer, and by how much? • Transfer size • How many bytes should it transfer each time? • Number of transfers • Trigger event • What causes the DMA controller to do transfers?
Wrapping Up • Homework #4 is due Friday, April 4th, 2008 • Quiz #2 to potentially be rescheduled for Thursday, April 10th from 7:15 to 8:30 • Does this work for people • Reading for next week9 • Textbook 7.5, 9 • ADUC 9-10, 33-36, 43-47, 79-82
Definitions • VIHmin – minimum input voltage recognized as a logical 1 • VILmax – maximum input voltage recognized as a logical 0 • VOHmin – minimum voltage output for a logical 1 • VOLmax – maximum voltage output for a logical 0 • IOHmax – maximum output current sourced for a logical 1 • IOLmax – maximum output current sunk for a logical 0 • IIHmax – maximum input current required at a logical 1 • IILmax – maximum input current required at a logical 0 • IOZH, IOZL – current drawn/sourced when tri-stated • Currents are defined positive in, negative out
Logic Families • Classic • HC – high-speed CMOS, AC – fast HC • HCT – high-speed CMOS with TTL compatible input, ACT – fast • LS – low-power Schottky, ALS – fast LS, lower power • More recent • LVC – low voltage CMOS • AUC – ultra-low voltage CMOS • GTL – Gunning transceiver logic • CBT – cross bar technology • TinyLogic / Little Logic • Note single gate devices and very small packaging • Why are people using these?
Logic Compatibility Exercises • For the following logic families, determine compatibility, noise margins, and fan-out. • 74AC driving 74ALS • 74ALS driving 74AC Note: For 74AC, top line is with CMOS load, bottom line is with TTL load.
Timer Peripherals • Basic free-running timer • Periodic timer for variable timing
Timer Peripherals • Timer clocked from different sources • Add FF for square-wave ouptut
Timer Peripherals • Adding capture capability to know when a specific event occurred
Timer0 MMRs • T0LD – load counter value • T0VAL – read counter value • T0CLRI – clear timer interrupt • T0CON - Configuration