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Efficient HW/SW Codesign & Cosimulation with CodeSimulink

Learn to design a Common Rail test bench using a MATLAB/Simulink environment. Explore HW/SW partitioning, simulations, and code techniques.

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Efficient HW/SW Codesign & Cosimulation with CodeSimulink

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  1. A Codesign and Cosimulation Environment Based on MATLAB/Simulink ModelsApplication to the design of a Common Rail test bench L.M. Reyneri, E. Bellei, E. Bussolino, L. Mari, F. Renga September 2002 Politecnico di Torino CodeSimulink: a HW/SW Codesign Environment

  2. Part I A Typical Design Framework CodeSimulink: a HW/SW Codesign Environment

  3. Common Rail Test bench CodeSimulink: a HW/SW Codesign Environment

  4. System Specifications Power Electronics HW SW Mechanical Electrical Plant User Interface User Environment CodeSimulink: a HW/SW Codesign Environment

  5. Common Rail Test bench CodeSimulink: a HW/SW Codesign Environment

  6. Design Partition - I Power Electronics HW SW Mechanical Electrical Plant User Interface User Environment Electromechanical Designer CodeSimulink: a HW/SW Codesign Environment

  7. Design Partition - II Electronics Designer Power Electronics HW SW Mechanical Electrical Plant User Interface User Environment CodeSimulink: a HW/SW Codesign Environment

  8. Design Partition - III Control SW Designer Power Electronics HW SW Mechanical Electrical Plant User Interface User Environment User I/F Designer CodeSimulink: a HW/SW Codesign Environment

  9. Design Partition - IV Power Electronics HW SW Mechanical Electrical Plant User Interface User Environment Psychology Law Market CodeSimulink: a HW/SW Codesign Environment

  10. Design Partition – Simulations (?) SPICE VHDL SystemC VCC Assembler C/C++ Power Electronics HW SW Mechanical Electrical Plant Autocad FEM User Interface User Environment Visual BASIC CodeSimulink: a HW/SW Codesign Environment

  11. Intermediate Result if then else goto linux, ??? Power Electronics HW V, A, W, Hz, a, g, ??? SW Mechanical Electrical Plant User Interface Windows, mm, icon, click, ??? UNI, inches, degrees, ??? User Environment impact user-friendly colours, ??? CodeSimulink: a HW/SW Codesign Environment

  12. Someone will take decisions… CodeSimulink: a HW/SW Codesign Environment

  13. … and someone will payfor the mistakes CodeSimulink: a HW/SW Codesign Environment

  14. Final Result (perfect agreement…) It’s YOUR fault !!! my part is fine Power Electronics HW It’s YOUR fault !!! my part is fine SW Mechanical Electrical Plant User Interface It’s YOUR fault !!! my part is fine It’s YOUR fault !!! my part is fine User Environment It’s YOUR fault !!! my part is fine CodeSimulink: a HW/SW Codesign Environment

  15. Conclusion (but it works…) Power Electronics HW SW Mechanical Electrical Plant User Interface User Environment Patches CodeSimulink: a HW/SW Codesign Environment

  16. Part II HW vs. SW vs. Analog Integrated Design CodeSimulink: a HW/SW Codesign Environment

  17. HW/SW Design Styles and Languages CodeSimulink: a HW/SW Codesign Environment

  18. Techniques and Platforms CodeSimulink: a HW/SW Codesign Environment

  19. When do we need HW? • Complex or high speed functions (counters, timers, PWM) • To reduce complexity of SW (slower sample time, smaller CPU) • Repetitive and/or regular operations • Reliability CodeSimulink: a HW/SW Codesign Environment

  20. Traditional HW/SW design High level languages System description/specs. Requires experience HW/SW partitioning Critical HW/SW interfaces Detailed design HW SW Very expensive loop Simulation/verification Does it work? Very seldom Enough performance Compilation HW SW Automatic ASIC/FPGA DSP/PC Programmation (System-on-chip) Assembly and testing Often yes, but… Enough performance? Production CodeSimulink: a HW/SW Codesign Environment

  21. Integrated HW/SW codesign System description/specs. High level languages Functional simulation High level simulator HW/SW partitioning Automatic/driven/manual Fast performance estimation Very quick loop Enough performance? Compilation HW SW Automatic ASIC/FPGA DSP/PC Programmation (System-on-chip) Assembly and testing Often yes, but… Enough performance? Production CodeSimulink: a HW/SW Codesign Environment

  22. Part III CodeSimulink environment for HW/SW/mixed-mode codesign and cosimulation CodeSimulink: a HW/SW Codesign Environment

  23. Existing Codesign tools CodeSimulink: a HW/SW Codesign Environment

  24. Codesign under CodeSimulink System description/specs. High level languages Functional simulation High level simulator HW/SW partitioning Automatic/driven/manual Fast performance estimation Very quick loop Enough performance? Compilation HW SW Automatic ASIC/FPGA DSP/PC Programmation (System-on-chip) Assembly and testing Often yes, but… Enough performance? Production CodeSimulink: a HW/SW Codesign Environment

  25. System Description CodeSimulink: a HW/SW Codesign Environment

  26. Assigning Functional Parameters CodeSimulink: a HW/SW Codesign Environment

  27. Simulations • Functional verification • Parameter tuning, ecc. CodeSimulink: a HW/SW Codesign Environment

  28. Codesign under CodeSimulink System description/specs. High level languages Functional simulation High level simulator HW/SW partitioning Automatic/driven/manual Fast performance estimation Very quick loop Enough performance? Compilation HW SW Automatic ASIC/FPGA DSP/PC Programmation (System-on-chip) Assembly and testing Often yes, but… Enough performance? Production CodeSimulink: a HW/SW Codesign Environment

  29. Implementations • Digital HW; different architectures: • Synchronous parallel (base architecture) • bit-serial (smaller, slower) • systolic (faster) • interfaces among architecture • Analog HW; different architectures (under developm.): • Voltage/current single-ended/differential • Frequency/pulseWidth modulation • SW: different CPU’s • External/Simulink: to simulate “external” world (plant, actuators, sensors, environment, etc.) CodeSimulink: a HW/SW Codesign Environment

  30. HW/SW partitioning (manual) CodeSimulink: a HW/SW Codesign Environment

  31. +/- 1 0 1 1 0 Implementation parameters • DATAWIDTH (number of bits) • BINARYPOINT (position of fixed point) • REPRESENTATION ((un)signed, sign/modulus) • OVERFLOW (saturation/wraparound) • TRUNCATION (floor, ceil, round, etc.) • PIPELINE (latency, speed) +3.50 CodeSimulink: a HW/SW Codesign Environment

  32. Different Data Types • Scalars (one data per sample) • Vectors (a vector of data per sample; mux/demux): • serial (data sequentially on a single channel) • parallel (data in parallel on different channels) • Matrices (a matrix of data per sample; for instance images in TV or vision): • serial • parallel/serial • serial/parallel CodeSimulink: a HW/SW Codesign Environment

  33. Scalar data Parallel vector 1 2 2 1 2 2 3 6 2 5 10 2 serial vector 7 14 2 1,3,5,7 2,6,10,14 2 Serial and parallel vectors CodeSimulink: a HW/SW Codesign Environment

  34. Assigning HW parameters CodeSimulink: a HW/SW Codesign Environment

  35. Parameters are associated with signals Parameters assigned with output ports ! CodeSimulink: a HW/SW Codesign Environment

  36. Adding interfaces between architectures • Block to block: automatic (e.g. HW: synchronous data-flow protocol) • HW/SW: they depend on chosen platform (see further) • digital/analogue: they depend on A/D, D/A converters • HW/external, SW/external (encoder, PWM, A/D.D/A, etc.): they have appropriate parameters CodeSimulink: a HW/SW Codesign Environment

  37. DATO DATO VAL VAL RDY RDY DATO VAL RDY Synchronous data-flow protocol • If source has a valid data (VAL), and… • if destinations are ready to receive it (RDY), … • then data is transferred at next clock edge • Guarantees correct timing! CodeSimulink: a HW/SW Codesign Environment

  38. Post-assigning simulations(bit-accurate) 6,-6 6,0 6,-2 CodeSimulink: a HW/SW Codesign Environment

  39. Codesign under CodeSimulink System description/specs. High level languages Functional simulation High level simulator HW/SW partitioning Automatic/driven/manual Fast performance estimation Very quick loop Enough performance? Compilation HW SW Automatic ASIC/FPGA DSP/PC Programmation (System-on-chip) Assembly and testing Often yes, but… Enough performance? Production CodeSimulink: a HW/SW Codesign Environment

  40. Quick Performance Estimation • Every cell has an (approximate) performance model which depends on: • technology (HW/SW/analogic) • architecture (parallel, bit-serial, etc.) • accuracy: --> num. bit (HW), power (anal.), etc. • CodeSimulink “accumulates” performance • Quick performance estimation, without time-consuming compilation CodeSimulink: a HW/SW Codesign Environment

  41. Quick performance estimation CodeSimulink: a HW/SW Codesign Environment

  42. Quick performance estimation CodeSimulink: a HW/SW Codesign Environment

  43. Performances • Number of cells (FPGA) or area (ASIC) • Power dissipation (battery duration...) • Latency (computing delay) • Max. clock Frequency (not yet…) • Max sample frequency • Code and data size (RAM size) • Accuracy (S/N, bit number), from simulations CodeSimulink: a HW/SW Codesign Environment

  44. Codesign under CodeSimulink System description/specs. High level languages Functional simulation High level simulator HW/SW partitioning Automatic/driven/manual Fast performance estimation Very quick loop Enough performance? Compilation HW SW Automatic ASIC/FPGA DSP/PC Programmation (System-on-chip) Assembly and testing Often yes, but… Enough performance? Production CodeSimulink: a HW/SW Codesign Environment

  45. CodeSimulink compilation • Separation of multiple platforms • Hierarchy removal (flattening) • Separation of SW, digital HW, analog HW blocks • Adding interfaces • Translation: CodeSimulink (SW) --> C (RTW) • Translation: CodeSimulink (digital) --> VHDL • Translation: CodeSimulink (analogic) --> EDIF CodeSimulink: a HW/SW Codesign Environment

  46. HW/SW Compilation • Possibility to edit VHDL/C/EDIF code • Compilation: VHDL --> ASIC, FPGA (Altera, Xilinx, others) (Leonardo - Mentor Graphics + proprietary tool) • Compilation: C --> executable (ANSI C compiler) • Post-compilation performance evaluation CodeSimulink: a HW/SW Codesign Environment

  47. Every cell is made of... • Simulink symbol • Fast functional model for simulations (template) • Performance estimation model (SW, HW, …) (template) • VHDL, EDIF, C description (template) • Parameter editing mask (template) • Documentation (template) CodeSimulink: a HW/SW Codesign Environment

  48. Codesign under CodeSimulink System description/specs. High level languages Functional simulation High level simulator HW/SW partitioning Automatic/driven/manual Fast performance estimation Very quick loop Enough performance? Compilation HW SW Automatic ASIC/FPGA DSP/PC Programmation (System-on-chip) Assembly and testing Often yes, but… Enough performance? Production CodeSimulink: a HW/SW Codesign Environment

  49. Platforms • SW-only (CPU, microprocessors, PC’s, etc.) • HW-only (ALTERA, XILINX, ASIC, etc.) • HW/SW: • board (CPU+FPGA) • Systems-on-chip (ASIC: core+gates) • Programmable systems-on-chip CodeSimulink: a HW/SW Codesign Environment

  50. A few commercial platforms • SIDSA: HDST100 board (ARM7TDMI + Altera 10k100) • SIDSA: HDST200 board (ARM7TDMI + Altera 10k100) • SIDSA: FIPSOC chip (80C51 + FPGA) • SUNDANCE: HDT355 board (TMS320C30 + Altera 10k100) • SUNDANCE: HDT367 board (ARM + Xilinx Virtex) • TRISCEND: chip (80C51 + FPGA) • TRISCEND: chip (ARM7TDMI + FPGA) • ALTERA: Excalibur chip (ARM7TDMI + FPGA) CodeSimulink: a HW/SW Codesign Environment

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