An Abstract Model of De-synchronous Circuit Design and Its Area Optimization

1. An Abstract Model of De-synchronous Circuit Design and Its Area Optimization Jin Gang University of Manchester

2. Overview • Motivation • Design flow • Abstract model－Control Graph • Timed Petri-net model for Control Path • Performance Evaluation • Area Optimization • Conclusion

3. Motivation • Asynchronous Circuit • Benefit • Low power • Better EMC • Modularity • Drawback • Difficult to design

4. Motivation • De-synchronous Circuit • Benefit • Benefit from Asynchronous • Design within synchronous design tools • Drawback • Not the original asynchronous design method • May introduce some area overhead into circuit

5. Design Flow • Datapath design is the same as synchronous counterpart • More concern need to give to the control path

6. Design Flow 1. Split each flip-flop into a master-slave latch pair. 2. Generate the matched delay unit for each combinationallogic path. 3. Implement the local controller corresponding toeach latch.

7. Control Graph • An abstract model for control path • Use a directed graph to represent the control path • Purpose of this model • Evaluate the performance of the circuit • Optimize the circuit

8. Control Graph

9. Control Graph

10. Timed Petri-net model for control path A Timed Petri-net model for control path can be derived from control graph

11. Performance Evaluation • Use the average cycle time to evaluate the performance of the de-synchronous circuit • The performance evaluation is a linear programming problem

12. Area Optimization • Multi local controllers can be combined to a single local controller • Condition • Only the local controllers with same polarity can be combined • This combination can preserve the equality of the circuit

13. Area Optimization

14. Area Optimization • This optimization problem is NP-hard • The optimizing procedure need be directed by the performance evaluation function, which can grantee the performance of the circuit • This optimization is a trade-off between the area and the benefit of asynchronous circuit

15. Area Optimization • Θ is the a thresholddefined to control the maximal number of the latchescan driven by a single local controller • After the optimization, the fan-in and fan-out of the control path will be changed, so the area also will be changed according it

16. Results Θ=2

17. Results Θ=3

18. The change of average fan-in and fan-out

19. Conclusion • Compatible with synchronous design method • Can reduce the area overhead of the control path • Can preserve the performance of the circuit • Will lose some benefit of asynchronous circuit

20. Finish Thanks for your attention