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L2mu System - Status. DONE. Track Finding (main data processing) Next: SLIC Upstream and Downstream. SLICs. UPSTREAM; CICs and SFOs. CIC crate; hooked into place by June 8 Boards return from stuffing ~end of May Bench tests (MIS-Eng.) done by June 8
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L2mu System - Status DONE Track Finding (main data processing) Next: SLIC Upstream and Downstream SLICs UPSTREAM; CICs and SFOs • CIC crate; hooked into place by June 8 • Boards return from stuffing ~end of May • Bench tests (MIS-Eng.) done by June 8 • Ship to fnal, then full cabling at MCH3 UPSTREAM fully hooked up by mid-to-late June • Worst case scenario: no downstream yet – we can; • Check all cabling /connections: run BIST tests • over all sources, cross check data origin (headers) • Exercise SLIC-run-init (SCL-init if SCL available) • Receive/Dump a few events – Formats,Endianess,etc. • First look at DSP-times, Event Sizes, at very limited • speeds (by re-routing SLIC output to VME -- dump) next; DOWNSTREAM; MBTs and Alphas
Downstream - Alphas X Two major problems remaining • (1) DMA – data input • Last week at UMich, problem solved • (R.S. DØ + S.M. CDF) – standing ovation • Current boards acquire 8 “white wire” mods • Upgrade incorporated into future production • “future production” does not delay muons • Current boards destined to Cal+Muo+Global (2) PIO – board to board Mbus Communications Current understanding: an fpga programming problem, (rather than a Bus problem) – Joint effort DØ + CDF Highest priority: estimated ~2 weeks, will know soon -- Big decision next week; whether to order remaining boards prior to seeing PIO solution (?)... Circumventing PIO – OK for low rate Test Mode • have single alpha performing worker + administrator • takes little extra software, plus a few kluges in system • Note: Current design of “Beta” approved • Project (Virginia+Orsay+ Maryland) goes ahead
Downstream - MBTs Last steps remaining (priority ordered) (1) Enable the SCL functions • FW-SCL (L1+L2) into MBT-daughter board • L1 decision formatted, buffered, broadcast (all SLICs) • L2 decision stored in buffer accessible by MBus – • raises a pin in backplane to trigger PIO-read by Alpha • Other Functions; • request SCL-init • raise L1-busy ( L2 input buffers full, stop L1 ) • raise L2 busy (L2 output buffers full, stop L2 ) Status: firmware mostly completed, D.Baden @ fnal, testing as we speak... (2) Multichannel Broadcasts (2) Multichannel Broadcasts • HotLinks-to-MagicBus-to-Alphas ; Firmware done, • needs testing (was held by DMA -- ~1week job) (3) Additional MBT firmware steps • Cypress output from preprocessor to Global (MBus PIO to MBT) • L2Global answer to L2 HWFW (hardware exists, being debugged) GOAL: Mu+Cal Online in August
L2mu System - Status (cont.) Cables • all cables in place, except; • CIC (14) SLIC (16) Simulator • All SLIC algorithms in place • (4 stub finders, 2 L1 reporters) • All Alpha algorithms in place • (Central & Forward track builders) • Framework done/tested, Input-to-Ntup • Now adding the Lookup Tables (versions) • Expect to run from CVS next week • Exercise + Tune + Test Robustness of all • algorithms with simulator – Online links • from the same files, reads same tables, etc. Note: SLIC+Alpha processors do the track finding. Trigger decisions are only made by L2-Global. Development of Global needs a functioning Alpha. SLIC: current development work is online monitoring and error handling
I – Remarks on Run-II L2mu • Dimuons • First time we trigger on A-stubs; • Fundamentally different from higher thresholds • Likely one of the strengths of L2 ( inherits CFT • coincidence at L1, adds Aφ granularity + PDT • track residuals. • Dimuons with A-stubs a much faster collection • of J/ψ ‘s than in Run-I (Eff’s, p-Calib, p-Resoln) • Early run: optimize bandwidth to collect J/ψ ‘s • Example: L1(μ+μ–) + L2(M&P) + L3(μ μ Mass) • in // with special runs on other subdetectors • (expected J/ψ visibility of 0.1Hz at 1.E31/cm2/s) • Another (and faster) control sample: • Muon-in-jet is a bona-fide guarantee of μ-quality • Use higher threshold single tracks to study A-stubs • Example: L1(μ+jet) + L2(M&P) + L3(μ-in-jet) • (cross section large enough for a special run) (*100 – thres&η)
II – “Prove that L2mu is working” i.e. we get every muon (efficiency) we reject junk (rates, purity) Job: Monitor the efficiency as nearly online as possible L2 single track Efficiency = #L2 pass (for an ID-controlled sample) #L1 pass • it is an approximate efficiency (ID bias) • value depends on LMT of either trigger • From Run-I; an effective ID control is • loose muon (to minimize bias) • inside jet (to certify beam origin) • --but jet introduces (L1) CFT bias... • Opp. φ-hemisphere to leading jet • obs: more accurate ID with less bias (eye scan, • dimuon resonances etc.) come only much later online offline Two examples A. Maciel (NIU) Muon L-2
II-1. L2mu Eff. Monitoring Online Possible with a L2-monitor trigger L1*L2*L3 L1;mu+jet , lowest jet threshold, 3 layer muons (4 GeV thresh.) prescale as needed (or raise jet) muon configurable as L , M , T L2; mark and pass (1mu w/ L1) L3;apply ID-control filter loose muon (L1 tagged) inside jet • performance histos can go to Examine • prescaled full readout of L2 data to tape • difficult to monitor lowest Pt threshold A. Maciel (NIU) Muon L-2
II-2. L2mu Eff. Monitoring Offline • Building a control sample: • Unbiased (virtual) trigger • ID-control selection Unbiased Virtual Trigger Bits, set upon reconstruction of ALL stream. MU_UNBIASED , CFT_UNBIASED , CAL_UNBIASED etc... Where MU_UNBIASED = .OR. of all triggers w/out Muons MU_UNBIASED .AND. CFT_UNBIASED is effectively an offline mark&pass sample for both L1mu and L2mu Apply ID-control filter to this sample and extract efficiencies from trigger bits Apply ID-control filter to L2µ passed events in this sample and examine purity (rejection) A. Maciel (NIU) Muon L-2